AFE7686
Transceptor de muestreo de RF de 4 transmisores y 4 receptores, de 100 MHz a 5.2 GHz, con un IBW
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AFE7686
- 14-Bit resolution
- Sample rate:
- DAC: 9GSPS
- ADC: 3GSPS
- RF Frequency range: up to 5.2 GHz
- Maximum RF signal bandwidth
- Quad-channel mode (4T4R): 800 MHz (single-band); 300 MHz (dual-band)
- Dual-channel mode (2T2R): 1200 MHz (TX)/1000 MHz (RX) (single-band); 800MHz(dual-band)
- On-chip dual selectable DSAs per RX channel
- Integrated TX DSA functionality
- Digital:
- Dual band digital up-converters (DUCs)
- Dual Band digital down-converters (DDCs)
- 32-Bit NCOs for DUCs/DDCs
- Interpolation ratio: 6x, 8x, 9x, 12x, 16x, 18x, 24x, 36x
- Decimation ratio: /2, /3, /4, /6, /8, /9, /12, /16, /18, /24, /32
- RX/FB Dynamic switching for TDD
- Interface:
- 8 SerDes Transceivers up to 15Gbps
- 16-Bit and 12-bit JESD204B transport layer formatting with 8b/10b encoding
- Subclass 1 multi-device synchronization
- Clock:
- Internal PLL/VCO to generate DAC and ADC clocks
- Package: 17mm x 17mm FC BGA, 0.8mm pitch
- Power supplies: 1.85 V, 1.15 V, 1.0 V, –1.8 V
The AFE76xx is a family of high performance, quad/dual channel, 14-bit, integrated RF sampling analog front ends (AFEs) with 9 GSPS DACs and 3 GSPS ADCs, capable of synthesizing and digitizing wideband signals. High dynamic range allows the AFE76xx to generate and digitize 3G/4G signals for wireless base stations. In TDD mode, the receiver channel can be configured to dynamically switching between traffic receiver (TDD RX) status and wideband feedback receiver (TDD FB) status to assist DPD (Digital Pre-Distortion) of the Power Amplifier (PA) on the transmitter path.
The AFE76xx family has integrated DSA on the receiver channels and also supports DSA equivalent functionality on the transmitter channels. Each receiver channel has one analog RF peak power detector and various digital power detectors to assist AGC control for receiver channels, and two RF overload detectors for device reliability protection. The AFE76xx family has 8 of JESD204B compatible SerDes transceivers running up to 15 Gbps. The devices have up to two DUCs per TX channel and two DDCs per RX channel, with multiple interpolation/decimation rates and digital quadrature modulators/demodulators with independent, frequency flexible NCOs. The devices support more than 1000 MHz (800 MHz as 4T4R) RF signal bandwidth in single-band mode, and up to 800 MHz (300 MHz as 4T4R) RF signal bandwidth per band in dual-band mode. A low jitter PLL/VCO simplifies the sampling clock generation by allowing use of a lower frequency reference clock.

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Para todas las demás aplicaciones, consulte nuestros AFE de muestreo de RF de uso general.
Documentación técnica
Tipo | Título | Fecha | ||
---|---|---|---|---|
* | Data sheet | AFE76xx Quad/dual-channel, RF sampling analog front-end with 14-bit 9GSPS DACs and 14-bit 3GSPS ADCs datasheet (Rev. E) | PDF | HTML | 01 mar 2019 |
Application note | MIMO Transceiver with AFE76xx for LTE and 5G Wireless Radio (Rev. A) | 02 sep 2021 | ||
Application note | Temp Profile to Maintain Optimum FIT Performance | 23 jul 2019 | ||
Application note | RF Sampling for Multi-band Radios | 26 nov 2018 | ||
Application note | Small Cell and Repeater System Using Integrated RF Sampling Device | 12 nov 2018 | ||
Application note | AFE76xx as a Single-Chip Wideband Repeater Using Loopback Mode | 01 nov 2018 | ||
Application note | Dither Improves ACPR in RF Sampling DAC | 24 oct 2018 | ||
Application note | Modular Communications Transceiver for 4G/5G Distributed Antenna | 18 ago 2018 | ||
Application note | AFE768x Power Dissipation Comparison across Modes | 25 jul 2018 | ||
EVM User's guide | AFE76xx Evaluation Module User's Guide | 16 mar 2018 | ||
Application note | An Efficient LDO-less Power Supply Solution for AFE76xx | 13 nov 2017 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
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ADC de alta velocidad (≥ 10 MSPS)
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Productos y hardware compatibles
Productos
DAC de alta velocidad (> 10 MSPS)
ADC de alta velocidad (≥ 10 MSPS)
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Transceptores RF
Receptores RF
Transmisores RF
Desarrollo de hardware
Placa de evaluación
Software
Soporte de software
Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
---|---|---|
FCBGA (ABJ) | 400 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
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Soporte y capacitación
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