AM3517

ACTIVO

Procesador Sitara: ARM Cortex-A8, gráficos 3D, frontal de video

Detalles del producto

CPU 1 Arm Cortex-A8 Frequency (MHz) 60 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
CPU 1 Arm Cortex-A8 Frequency (MHz) 60 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
BGA (ZER) 484 529 mm² (23 mm × 23 mm) NFBGA (ZCN) 491 289 mm² (17 mm × 17 mm)
  • AM3517/05 Sitara Processor:
    • MPU Subsystem
      • 600-MHz Sitara ARM Cortex-A8 Core
      • NEON SIMD Coprocessor and Vector
        Floating-Point (FP) Coprocessor
    • Memory Interfaces:
      • 166-MHz 16- and 32-Bit mDDR/DDR2
        Interface with 1GB of Total Addressable
        Space
      • Up to 83 MHz General-Purpose Memory
        Interface Supporting 16-Bit-Wide
        Multiplexed Address/DataBus
      • 64KB of SRAM
      • 3 Removable Media Interfaces
        [MMC/SD/SDIO]
    • IO Voltage:
      • mDDR/DDR2 IOs: 1.8V
      • Other IOs: 1.8V and 3.3V
    • Core Voltage: 1.2V
    • Commercial and Extended Temperature Grade
      (operating restrictions apply)
    • 16-Bit Video Input Port Capable of
      Capturing HD Video
    • HD Resolution Display Subsystem
    • Serial Communication
      • High-End CAN Controller
      • 10/100 Mbit Ethernet MAC
      • USB OTG Subsystem with Standard
        DP/DM Interface [HS/FS/LS]
      • Multiport USB Host Subsystem [HS/FS/LS]
        • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
          Interface
      • Four Master and Slave Multichannel Serial
        Port Interface(McSPI) Ports
      • Five Multichannel Buffered Serial Ports (McBSPs)
        • 512-Byte Transmit and Receive Buffer
          (McBSP1/3/4/5)
        • 5-KB Transmit and Receive Buffer (McBSP2)
        • SIDETONE Core Support (McBSP2 and
          McBSP3 Only)For Filter, Gain, and Mix
          Operations
        • 128-Channel Transmit and Receive Mode
        • Direct Interface to I2S and PCM Device and
          TDM Buses
      • HDQ/1-Wire Interface
      • 4 UARTs (One with Infrared Data Association
        [IrDA] and Consumer Infrared [CIR] Modes)
      • 3 Master and Slave High-Speed Inter-Integrated
        Circuit (I2C) Controllers
      • Twelve 32-bit General-Purpose Timers
      • One 32-bit Watchdog Timer
      • One 32-bit 32-kHz Sync Timer
      • Up to 186 General-Purpose I/O (GPIO) Pins
  • Display Subsystem
    • Parallel Digital Output
    • Up to 24-Bit RGB
    • Supports Up to 2 LCD Panels
    • Support for Remote Frame Buffer Interface (RFBI)
      LCD Panels
    • Two 10-Bit Digital-to-Analog Converters (DACs)
      Supporting
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation of 90, 180, and 270 Degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-Bit Alpha Blending
  • Video Processing Front End (VPFE) 16-Bit Video Input Port
    • RAW Data Interface
    • 75-MHz Maximum Pixel Clock
    • Supports REC656/CCIR656 Standard
    • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
      Horizontal and Vertical Sync Signals)
    • Generates Optical Black Clamping Signals
    • Built-in Digital Clamping and Black Level Compensation
    • 10-Bit to 8-Bit A-law Compression Hardware
    • Supports up to 16K Pixels (Image Size) in Horizontal
      and Vertical Directions
  • System Direct Memory Access (sDMA) Controller (32 Logical
    Channels with Configurable Priority)
  • Comprehensive Power, Reset, and Clock Management
  • ARM Cortex-A8 Memory Architecture
    • ARMv7 Architecture
      • In-Order, Dual-Issue, Superscalar Microprocessor Core
      • ARM NEON Multimedia Architecture
      • Over 2x Performance of ARMv6 SIMD
      • Supports Both Integer and Floating-Point SIMD
      • Jazelle RCT Execution Environment Architecture
      • Dynamic Branch Prediction with Branch Target Address
        Cache, Global History Buffer and 8-Entry Return Stack
      • Embedded Trace Macrocell [ETM] Support for
        Noninvasive Debug
      • 16KB of Instruction Cache (4-Way Set-Associative)
      • 16KB of Data Cache (4-Way Set-Associative)
      • 256KB of L2 Cache
    • PowerVR SGX Graphics Accelerator (AM3517 Only)
      • Tile-Based Architecture Delivering up to 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine
        Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and
        2.0, OpenVG1.0
      • Fine-Grained Task Switching, Load Balancing, and
        Power Management
      • Programmable, High-Quality Image Anti-Aliasing
    • Endianess
      • ARM Instructions – Little Endian
      • ARM Data – Configurable
    • SDRC Memory Controller
      • 16- and 32-Bit Memory Controller with 1GB of
        Total Address Space
      • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
        (mDDR)SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-Bit-Wide Multiplexed Address/Data Bus
      • Up to 8 Chip-Select Pins with 128MB of Address
        Space per Chip-Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (with ECC
        Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface
        to Custom Logic (FPGA, CPLD, ASICs, and so forth)
      • Nonmultiplexed Address/Data Mode (Limited 2-KB
        Address Space)
    • Test Interfaces
      • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
      • Embedded Trace Macro Interface (ETM)
    • 65-nm CMOS Technology
    • Packages:
      • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
        [ZCN Suffix]
        with Via Channel Array
        Technology
      • 484-Pin PBGA (23 x 23, 1-mm Pitch)
        [ZER Suffix]
    • AM3517/05 Sitara Processor:
      • MPU Subsystem
        • 600-MHz Sitara ARM Cortex-A8 Core
        • NEON SIMD Coprocessor and Vector
          Floating-Point (FP) Coprocessor
      • Memory Interfaces:
        • 166-MHz 16- and 32-Bit mDDR/DDR2
          Interface with 1GB of Total Addressable
          Space
        • Up to 83 MHz General-Purpose Memory
          Interface Supporting 16-Bit-Wide
          Multiplexed Address/DataBus
        • 64KB of SRAM
        • 3 Removable Media Interfaces
          [MMC/SD/SDIO]
      • IO Voltage:
        • mDDR/DDR2 IOs: 1.8V
        • Other IOs: 1.8V and 3.3V
      • Core Voltage: 1.2V
      • Commercial and Extended Temperature Grade
        (operating restrictions apply)
      • 16-Bit Video Input Port Capable of
        Capturing HD Video
      • HD Resolution Display Subsystem
      • Serial Communication
        • High-End CAN Controller
        • 10/100 Mbit Ethernet MAC
        • USB OTG Subsystem with Standard
          DP/DM Interface [HS/FS/LS]
        • Multiport USB Host Subsystem [HS/FS/LS]
          • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
            Interface
        • Four Master and Slave Multichannel Serial
          Port Interface(McSPI) Ports
        • Five Multichannel Buffered Serial Ports (McBSPs)
          • 512-Byte Transmit and Receive Buffer
            (McBSP1/3/4/5)
          • 5-KB Transmit and Receive Buffer (McBSP2)
          • SIDETONE Core Support (McBSP2 and
            McBSP3 Only)For Filter, Gain, and Mix
            Operations
          • 128-Channel Transmit and Receive Mode
          • Direct Interface to I2S and PCM Device and
            TDM Buses
        • HDQ/1-Wire Interface
        • 4 UARTs (One with Infrared Data Association
          [IrDA] and Consumer Infrared [CIR] Modes)
        • 3 Master and Slave High-Speed Inter-Integrated
          Circuit (I2C) Controllers
        • Twelve 32-bit General-Purpose Timers
        • One 32-bit Watchdog Timer
        • One 32-bit 32-kHz Sync Timer
        • Up to 186 General-Purpose I/O (GPIO) Pins
    • Display Subsystem
      • Parallel Digital Output
      • Up to 24-Bit RGB
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI)
        LCD Panels
      • Two 10-Bit Digital-to-Analog Converters (DACs)
        Supporting
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-Video)
      • Rotation of 90, 180, and 270 Degrees
      • Resize Images From 1/4x to 8x
      • Color Space Converter
      • 8-Bit Alpha Blending
    • Video Processing Front End (VPFE) 16-Bit Video Input Port
      • RAW Data Interface
      • 75-MHz Maximum Pixel Clock
      • Supports REC656/CCIR656 Standard
      • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
        Horizontal and Vertical Sync Signals)
      • Generates Optical Black Clamping Signals
      • Built-in Digital Clamping and Black Level Compensation
      • 10-Bit to 8-Bit A-law Compression Hardware
      • Supports up to 16K Pixels (Image Size) in Horizontal
        and Vertical Directions
    • System Direct Memory Access (sDMA) Controller (32 Logical
      Channels with Configurable Priority)
    • Comprehensive Power, Reset, and Clock Management
    • ARM Cortex-A8 Memory Architecture
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Microprocessor Core
        • ARM NEON Multimedia Architecture
        • Over 2x Performance of ARMv6 SIMD
        • Supports Both Integer and Floating-Point SIMD
        • Jazelle RCT Execution Environment Architecture
        • Dynamic Branch Prediction with Branch Target Address
          Cache, Global History Buffer and 8-Entry Return Stack
        • Embedded Trace Macrocell [ETM] Support for
          Noninvasive Debug
        • 16KB of Instruction Cache (4-Way Set-Associative)
        • 16KB of Data Cache (4-Way Set-Associative)
        • 256KB of L2 Cache
      • PowerVR SGX Graphics Accelerator (AM3517 Only)
        • Tile-Based Architecture Delivering up to 10 MPoly/sec
        • Universal Scalable Shader Engine: Multi-threaded Engine
          Incorporating Pixel and Vertex Shader Functionality
        • Industry Standard API Support: OpenGLES 1.1 and
          2.0, OpenVG1.0
        • Fine-Grained Task Switching, Load Balancing, and
          Power Management
        • Programmable, High-Quality Image Anti-Aliasing
      • Endianess
        • ARM Instructions – Little Endian
        • ARM Data – Configurable
      • SDRC Memory Controller
        • 16- and 32-Bit Memory Controller with 1GB of
          Total Address Space
        • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
          (mDDR)SDRAM
        • SDRAM Memory Scheduler (SMS) and Rotation Engine
      • General Purpose Memory Controller (GPMC)
        • 16-Bit-Wide Multiplexed Address/Data Bus
        • Up to 8 Chip-Select Pins with 128MB of Address
          Space per Chip-Select Pin
        • Glueless Interface to NOR Flash, NAND Flash (with ECC
          Hamming Code Calculation), SRAM and Pseudo-SRAM
        • Flexible Asynchronous Protocol Control for Interface
          to Custom Logic (FPGA, CPLD, ASICs, and so forth)
        • Nonmultiplexed Address/Data Mode (Limited 2-KB
          Address Space)
      • Test Interfaces
        • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
        • Embedded Trace Macro Interface (ETM)
      • 65-nm CMOS Technology
      • Packages:
        • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
          [ZCN Suffix]
          with Via Channel Array
          Technology
        • 484-Pin PBGA (23 x 23, 1-mm Pitch)
          [ZER Suffix]

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

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      No se encuentra disponible ningún soporte de diseño de TI

      Este producto no cuenta con soporte de diseño continuo de TI para proyectos nuevos, como contenidos nuevos o actualizaciones de software. Si está disponible, encontrará material adicional, software y herramientas relevantes en la página del producto.

      Documentación técnica

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      Ver todo 12
      Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
      * Hoja de datos AM3517, AM3505 Sitara Processors datasheet (Rev. F) PDF | HTML 10/07/2014
      * Errata AM3517, AM3505 Sitara Processors Silicon Errata (Rev. E) 21/09/2016
      Más documentación From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16/12/2020
      Guía del usuario How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24/09/2018
      Informe Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 11/08/2016
      Artículo técnico Spring has sprung. A sale has sprung. PDF | HTML 4/04/2016
      Guía del usuario AM35x ARM Microprocessor Technical Reference Manual (Rev. C) 8/11/2013
      Nota sobre la aplicación Multi-Channel SAE-J2716 (SENT) Decoder Using NHET 5/08/2010
      Nota sobre la aplicación AM35x Power Estimation Spreadsheet 24/05/2010
      Nota sobre la aplicación AM35x VCA PCB Layout 24/05/2010
      Nota sobre la aplicación Migrating from OMAP3530 to AM35x 24/05/2010
      Nota sobre la aplicación AM3517/05 Pwr Ref Design 3.6V to 6.3-V Input, Hi-Effic, Integratd 5-Output PMIC 8/04/2010

      Diseño y desarrollo

      Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

      Sonda de depuración

      TMDSEMU200-U — Sonda de depuración XDS200 USB

      El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. Para la mayoría de los dispositivos, se recomienda utilizar el XDS110 (www.ti.com/tool/TMDSEMU110-U), que es más nuevo y de menor costo. El XDS200 es compatible con una amplia variedad de (...)

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      En inventario
      Límite:
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      No disponible
      Sonda de depuración

      TMDSEMU560V2STM-U — Sonda de depuración USB para rastreo del sistema con el software XDS560™ v2

      El XDS560v2 es el modelo de mayor rendimiento de la familia de sondas de depuración XDS560™ y es compatible tanto con el estándar JTAG tradicional (IEEE 1149.1) como con cJTAG (IEEE 1149.7).  Tenga en cuenta que no es compatible con la depuración por cable serie (SWD).

      Todas las sondas de (...)

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      En inventario
      Límite:
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      No disponible
      Sonda de depuración

      TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

      The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

      All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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      En inventario
      Límite:
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      No disponible
      Kit de desarrollo de software (SDK)

      ANDROIDSDK-SITARA — Kit de desarrollo Android para microprocesadores Sitara

      Aunque originalmente fue diseñado para teléfonos móviles, el sistema operativo Android ofrece a los diseñadores de aplicaciones integradas la capacidad de agregar fácilmente un sistema operativo de alto nivel a su producto. Desarrollado en asociación con Google, Android ofrece un sistema operativo (...)

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      Kit de desarrollo de software (SDK)

      LINUXEZSDK-AM35X — Linux EZ SDK for AM3517, AM3505

      SITARA LINUX SDK

      Linux Software Development Kits (SDK) provide Sitara™ developers with an easy set up and quick out-of-box experience that is specific to and highlights the features of TI's ARM processors. Launching demos, benchmarks and applications is a snap with the included graphical user (...)

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      IDE, configuración, compilador o depurador

      CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

      CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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      Sistema operativo (SO)

      GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
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      Sistema operativo (SO)

      MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
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      Sistema operativo (SO)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
      Desde: QNX
      Productos y hardware compatibles
      Ejemplo de código o demostración

      DEMOAPP-AM35X — DEMO: ejemplo de aplicación AM35x y código de demostración

      Free Example Code - TI provides proof-of-concept application code to demonstrate some of the hardware and software capabilities of its devices.

      • Click GET SOFTWARE to access Application Demo and Documentation, based on the AM35x EVM (evaluation module).
      Productos y hardware compatibles
      Controlador o biblioteca

      WIND-3P-VXWORKS-LINUX-OS — Procesadores Wind River VxWorks y sistemas operativos de Linux

      Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)

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      Herramienta de programación de software

      FLASHTOOL — FlashTool for AM35x, AM37x, DM37x and OMAP35x Devices

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      Herramienta de programación de software

      UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

      UniFlash forma parte del amplio ecosistema de desarrollo CCStudio™ de TI y es una herramienta de software diseñada para programar la memoria flash integrada en los microcontroladores y dispositivos de conectividad inalámbrica de TI, así como la memoria flash integrada en los procesadores de TI. (...)

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      Modelo de simulación

      AM35x ZCN BSDL Model (Rev. A)

      SPRM452B (11 KB) - Modelo BSDL
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      Modelo de simulación

      AM35x ZCN IBIS Model (Rev. A)

      SPRM451 (4174 KB) - Modelo IBIS
      Productos y hardware compatibles
      Modelo de simulación

      AM35x ZER BSDL Model

      SPRM505.ZIP (10 KB) - Modelo BSDL
      Productos y hardware compatibles
      Modelo de simulación

      AM35x ZER IBIS Model (Rev. A)

      SPRM504 (1431 KB) - Modelo IBIS
      Productos y hardware compatibles
      Herramienta de cálculo

      CLOCKTREETOOL — Herramienta de árbol de reloj para Sitara, automoción, análisis de visión y procesadores de señal di

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

      • Visualize the device clock tree
      • Interact with clock tree (...)
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      Herramienta de cálculo

      POWEREST — Herramienta de estimación de potencia (PET)

      La herramienta de estimación de potencia (PET) ofrece a los usuarios la posibilidad de obtener información detallada sobre el consumo de potencia de determinados procesadores TI. La herramienta incluye la posibilidad de que el usuario elija múltiples escenarios de aplicación y comprenda el consumo (...)

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      Encapsulado Pines Símbolos CAD, huellas y modelos 3D
      BGA (ZER) 484 Ultra Librarian
      NFBGA (ZCN) 491 Ultra Librarian

      Pedidos y calidad

      Soporte y capacitación

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      El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

      Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

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