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HTQFP (PHP) 48 81 mm² (9 mm × 9 mm)
  • Upgraded Daisy Chain Interface
    • 2x parallel SPI ports to MCU to support split chain with single bridge device
    • 2-wire isolated interface, SPI to MCU
    • 2Mbps single chain/ring, 4Mbps split chain for up to 4x speed improvement
    • Isolation: Transformer or capacitor-only
    • Support for ring architecture
  • Low Power Reverse wakeup
    • Available without ring architecture
  • SPI and I2C Controller
    • SPI/I2C Hub: can be placed remotely in a system to interface with distant peripheral devices
    • SPI controller for up to 8 peripheral devices
    • GPIO interrupt detection for signals from peripheral devices
  • Package: 48-pin QFP, 0.5mm pitch
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation to aid ISO 26262 and IEC 61508 system design up to ASIL-D/SIL-3
  • Power Consumption
    • Active mode: < 100mW
    • Sleep mode: < 0.5mW
    • Deep Sleep mode: < 0.05mW
  • Upgraded Daisy Chain Interface
    • 2x parallel SPI ports to MCU to support split chain with single bridge device
    • 2-wire isolated interface, SPI to MCU
    • 2Mbps single chain/ring, 4Mbps split chain for up to 4x speed improvement
    • Isolation: Transformer or capacitor-only
    • Support for ring architecture
  • Low Power Reverse wakeup
    • Available without ring architecture
  • SPI and I2C Controller
    • SPI/I2C Hub: can be placed remotely in a system to interface with distant peripheral devices
    • SPI controller for up to 8 peripheral devices
    • GPIO interrupt detection for signals from peripheral devices
  • Package: 48-pin QFP, 0.5mm pitch
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation to aid ISO 26262 and IEC 61508 system design up to ASIL-D/SIL-3
  • Power Consumption
    • Active mode: < 100mW
    • Sleep mode: < 0.5mW
    • Deep Sleep mode: < 0.05mW

The device is used to translate SPI to Vertical Interface (VIF2) to communicate with a stack of BQ798xx cell monitors or pack monitors. There are 18 GPIOs that can be used for SPI/I2C communication, digital IOs, or fault interrupts from peripheral devices. The device can function as a SPI HUB and interface with upto 8 separate SPI devices/groups. Ultra-low current consumption in DEEP SLEEP mode supports reverse wakeup of an MCU through the 5V nFAULT pin or a PMIC through the 12V INH pin. The isolated bi-directional daisy chain ports support both capacitor and transformer based isolation.

The device is used to translate SPI to Vertical Interface (VIF2) to communicate with a stack of BQ798xx cell monitors or pack monitors. There are 18 GPIOs that can be used for SPI/I2C communication, digital IOs, or fault interrupts from peripheral devices. The device can function as a SPI HUB and interface with upto 8 separate SPI devices/groups. Ultra-low current consumption in DEEP SLEEP mode supports reverse wakeup of an MCU through the 5V nFAULT pin or a PMIC through the 12V INH pin. The isolated bi-directional daisy chain ports support both capacitor and transformer based isolation.

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Diseño y desarrollo

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Placa de evaluación

BQ79800EVM-093 — Módulo de evaluación BQ79800-Q1

El módulo de evaluación (EVM) BMS093-003 está diseñado para la evaluación del dispositivo BQ79800-Q1. Este EVM se puede utilizar para evaluar los diversos protocolos de comunicación integrados, incluidos los protocolos de interfaz serie de periféricos (SPI) de cadena simple, SPI de doble cadena, (...)

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Controlador o biblioteca

BQ79800-Q1-DESIGN — BQ79800-Q1 design resources

BQ79800-Q1 documentation repository
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BQ79800-Q1-FS — Functional Safety documentation for BQ79800-Q1

This secure folder stores Functional Safety document for BQ79800-Q1
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BQ79800-Q1-SW — BQ79800-Q1 software

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