CD40174B-MIL

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CMOS hexadecimal con flip flops tipo D

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Hoja de datos

document-pdfAcrobat CD40174B TYPES datasheet (Rev. C) (Inglés)

CD40174B-MIL

ACTIVO

Hoja de datos

Haga su pedido ahora

Detalles del producto

Number of channels

6

Technology family

CD4000

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

8

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Supply current (max) (µA)

600

Features

Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

Number of channels

6

Technology family

CD4000

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

8

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Supply current (max) (µA)

600

Features

Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

CDIP (J)

16

135.3552 mm² (— mm × — mm)

5-V, 10-V, and 15-V parametric ratings
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Shift Registers
- Buffer/Storage Registers
- Pattern Generators

5-V, 10-V, and 15-V parametric ratings
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Shift Registers
- Buffer/Storage Registers
- Pattern Generators

Cd40174B consists of six identical ’D’-type flip-flops having independent DATA inputs. The CLOCK and CLEAR\ inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic flip-flops are simultaneously reset by a low level on the CLEAR\ input.

The CD40174B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Cd40174B consists of six identical ’D’-type flip-flops having independent DATA inputs. The CLOCK and CLEAR\ inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic flip-flops are simultaneously reset by a low level on the CLEAR\ input.

The CD40174B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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Documentación principal	Tipo	Título	Opciones de formato	Descargar la versión más reciente en inglés	Fecha
*	Hoja de datos	CD40174B TYPES datasheet (Rev. C)			13/10/2003

CD40174B-MIL

CMOS hexadecimal con flip flops tipo D

CD40174B-MIL

Detalles del producto

Documentación técnica

Pedidos y calidad

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