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CD54HCT164

ACTIVO

Registro de desplazamiento de entrada en serie/salida en paralelo CMOS Logic de 8 bits de alta veloc

Detalles del producto

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (MHz) 24 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (MHz) 24 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 14 130.4652 mm² (— mm × — mm)
  • Buffered inputs
  • Asynchronous reset
  • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (overtemperature range)
    • Standard Outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temp range: – 55°C to 125°C
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL logic ICs
  • HC types
    • 2V to 6V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types
    • 4.5V to 5.5V operation
    • Direct LSTTL input logic compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS input compatibility, II ≤ 1µA at VOL, VOH
  • Buffered inputs
  • Asynchronous reset
  • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (overtemperature range)
    • Standard Outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temp range: – 55°C to 125°C
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL logic ICs
  • HC types
    • 2V to 6V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types
    • 4.5V to 5.5V operation
    • Direct LSTTL input logic compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS input compatibility, II ≤ 1µA at VOL, VOH

The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.

The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos CDx4HC164, CDx4HCT164 High-Speed CMOS Logic 8-Bit Serial-In, Parallel-Out Shift Register datasheet (Rev. E) PDF | HTML 7/05/2024
* SMD CD54HCT164 SMD 5962-89704 21/06/2016

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