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DRV8162

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Controlador de puerta inteligente de medio puente de 105 V máx. con STO

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DRV8162

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Detalles del producto

Rating Catalog Architecture Gate driver Vs (min) (V) 8 Vs ABS (max) (V) 115 Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
Rating Catalog Architecture Gate driver Vs (min) (V) 8 Vs ABS (max) (V) 115 Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
VSSOP (DGS) 20 24.99 mm² 5.1 x 4.9
  • Drives two N-channel MOSFETs in half-bridge configuration
    • High-side MOSFET source/drain up to 102V (absolute max)
    • 8V (5V DRV8162L) to 20V gate drive power supply
    • Integrated bootstrap diode
  • Functional Safety Quality-Managed
    • Documentation available to aid functional safety system design
  • Supports 100% PWM duty cycle with an integrated trickle charge pump
  • 16-level gate drive peak current
    • 16mA - 1000mA source current
    • 32mA - 2000mA sink current
    • Source-sink current ratio 1:1, 1:2, 1:3
  • Adjustable PWM dead time insertion 20ns - 900ns
  • Robust design for motor phase (SH) switching
    • Slew rate 50V/ns
    • Negative transient voltage -20V
    • 2A strong gate pull down
  • Split gate drive supply inputs for redundant shutdown (DRV8162, DRV8162L)
  • Low-offset current sense amplifier (DRV8161)
    • Adjustable gain (5, 10, 20, 40V/V)
  • Flexible PWM control interface; 2-pin PWM, 1-pin PWM, and independent PWM mode
  • 13-level VDS over current threshold
  • Independent shutdown pin (nDRVOFF)
  • Gate driver soft shutdown sequence
  • Integrated protection features
    • GVDD under voltage (GVDDUV)
    • Bootstrap under voltage (BST_UV)
    • MOSFET over current protection (VDS)
    • Shoot through protection
    • Thermal shutdown (OTSD)
    • Fault condition indicator (nFAULT)
  • Supports 3.3V, and 5V Logic Inputs
  • Drives two N-channel MOSFETs in half-bridge configuration
    • High-side MOSFET source/drain up to 102V (absolute max)
    • 8V (5V DRV8162L) to 20V gate drive power supply
    • Integrated bootstrap diode
  • Functional Safety Quality-Managed
    • Documentation available to aid functional safety system design
  • Supports 100% PWM duty cycle with an integrated trickle charge pump
  • 16-level gate drive peak current
    • 16mA - 1000mA source current
    • 32mA - 2000mA sink current
    • Source-sink current ratio 1:1, 1:2, 1:3
  • Adjustable PWM dead time insertion 20ns - 900ns
  • Robust design for motor phase (SH) switching
    • Slew rate 50V/ns
    • Negative transient voltage -20V
    • 2A strong gate pull down
  • Split gate drive supply inputs for redundant shutdown (DRV8162, DRV8162L)
  • Low-offset current sense amplifier (DRV8161)
    • Adjustable gain (5, 10, 20, 40V/V)
  • Flexible PWM control interface; 2-pin PWM, 1-pin PWM, and independent PWM mode
  • 13-level VDS over current threshold
  • Independent shutdown pin (nDRVOFF)
  • Gate driver soft shutdown sequence
  • Integrated protection features
    • GVDD under voltage (GVDDUV)
    • Bootstrap under voltage (BST_UV)
    • MOSFET over current protection (VDS)
    • Shoot through protection
    • Thermal shutdown (OTSD)
    • Fault condition indicator (nFAULT)
  • Supports 3.3V, and 5V Logic Inputs

The DRV816x devices are half-bridge gate drivers capable of driving high-side and low-side N-channel MOSFETs. The gate drive voltages are generated from the GVDD supply pin and the integrated bootstrap circuit is used to drive the high-side FET up to 102V drain. The Smart Gate Drive architecture supports 16-level (48 combination) gate drive peak current up to 1A source and 2A sink, and a built-in timing control of gate drive current. The devices can be used to drive various types of loads including brushless/brushed DC motors, PMSM, stepper motors, SRM, and solenoids.

Internal protection functions are provided for supply undervoltage, FET over-current, and die over temperature. The nFAULT pin indicates fault events detected by the protection features. The nDRVOFF pin initiates power stage shutdown independent from PWM control. The DRV8162 and DRV8162L devices offer split power supply architecture to assist safe torque off (STO) function.

Many device parameters including gate drive current, dead time, PWM control interface, and over current detection are configurable with a few passive components connected to device pins. An integrated low-side current sense amplifier (DRV8161) provides current measurement information back to the controller.

The DRV816x devices are half-bridge gate drivers capable of driving high-side and low-side N-channel MOSFETs. The gate drive voltages are generated from the GVDD supply pin and the integrated bootstrap circuit is used to drive the high-side FET up to 102V drain. The Smart Gate Drive architecture supports 16-level (48 combination) gate drive peak current up to 1A source and 2A sink, and a built-in timing control of gate drive current. The devices can be used to drive various types of loads including brushless/brushed DC motors, PMSM, stepper motors, SRM, and solenoids.

Internal protection functions are provided for supply undervoltage, FET over-current, and die over temperature. The nFAULT pin indicates fault events detected by the protection features. The nDRVOFF pin initiates power stage shutdown independent from PWM control. The DRV8162 and DRV8162L devices offer split power supply architecture to assist safe torque off (STO) function.

Many device parameters including gate drive current, dead time, PWM control interface, and over current detection are configurable with a few passive components connected to device pins. An integrated low-side current sense amplifier (DRV8161) provides current measurement information back to the controller.
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Documentación técnica

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* Data sheet DRV816x 100V Half-Bridge Smart Gate Driver with Integrated Protection and Current Sense Amplifier datasheet (Rev. C) PDF | HTML 18 feb 2025
Application brief Understanding Gate Driver Slew Rate Control, MOSFET Switching Optimization and Protection Features (Rev. A) PDF | HTML 11 dic 2025
Design guide 48V, 85A Small Form-Factor Three-Phase Inverter Reference Design for Integrated Motor Drives (Rev. B) PDF | HTML 28 may 2025
Application brief Gate Driver Design Requirements for Humanoid Robot Motor Drives PDF | HTML 21 may 2025
Application note Relating Payload to Brushless DC Motor Driver Specifications PDF | HTML 02 dic 2024
Application note Three-Phase vs Three-Single Half-Bridge Gate Drivers PDF | HTML 24 nov 2024
Technical article Cobots to humanoids: Driving system efficiency and safety into higher-power robots PDF | HTML 22 nov 2024

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DRV8161EVM — Módulo de evaluación DRV8161

El módulo de evaluación (EVM) DRV8161 es una etapa de accionamiento de corriente continua (CC) sin escobillas trifásica de 30 A basada en el controlador de puerta DRV8161 para motores de corriente continua sin escobillas (BLDC). El EVM permite evaluar rápidamente el dispositivo DRV8161, que hace (...)
Guía del usuario: PDF | HTML
No disponible en TI.com
Diseños de referencia

TIDA-010956 — Diseño de referencia de inversor trifásico de pequeño formato de 48 V y 85 A para accionamientos de

Este diseño de referencia muestra un inversor de accionamiento de motor trifásico con entrada CC de 48 V, salida RMS de 85 A. El controlador de puerta de medio puente inteligente de 100 V DRV8162L permite una etapa de potencia pequeña, robusta y de alta eficiencia. Se proponen rutas de desconexión (...)
Design guide: PDF
Diseños de referencia

TIDA-01629 — Diseño de referencia de inversor trifásico de 48 V/500 W con controlador de puerta inteligente para

La eficiencia, la protección y la integración son factores de diseño importantes para accionamientos compactos alimentados con CC, hasta 60 VCC. Este diseño de referencia muestra un inversor trifásico con una tensión de entrada nominal de 48 VCC y una corriente nominal de salida de 10 A eficaces.  (...)
Design guide: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
VSSOP (DGS) 20 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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