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SN74ALVC164245-EP

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Transceptor de cambio de nivel de 16 bits de 2.5 V a 3.3 V/3.3 V a 5 V con salidas de 3 estados de p

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Hoja de datos

SN74ALVC164245-EP

ACTIVO
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Detalles del producto

Bits (#) 16 Data rate (max) (Mbps) 300 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 2.3 Vin (max) (V) 3.6 Vout (min) (V) 3 Vout (max) (V) 5.5 Applications GPIO Features Output enable Prop delay (ns) 6.8 Technology family ALVC Supply current (max) (mA) 0.04 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Bits (#) 16 Data rate (max) (Mbps) 300 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 2.3 Vin (max) (V) 3.6 Vout (min) (V) 3 Vout (max) (V) 5.5 Applications GPIO Features Output enable Prop delay (ns) 6.8 Technology family ALVC Supply current (max) (mA) 0.04 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm)
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Member of the Texas Instruments Widebus™ Family
  • Max tpd of 5.8 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Member of the Texas Instruments Widebus™ Family
  • Max tpd of 5.8 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA.

To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA.

To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN74ALVC164245-EP datasheet (Rev. A) 20/09/2005
* Informe de radiación y confiabilidad CALVC164245IDGGREP Reliability Report 25/08/2011
* Informe de radiación y confiabilidad CALVC164245MDGGREP Reliability Report 25/08/2011
* VID SN74ALVC164245-EP VID V6205612 21/06/2016
Nota sobre la aplicación Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2/10/2024
Nota sobre la aplicación Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12/07/2024
Nota sobre la aplicación Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 3/07/2024
Guía de selección Voltage Translation Buying Guide (Rev. A) 15/04/2021

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