SN74AVCH8T245

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Transceptor de bus de alimentación doble de 8 bits con traducción de tensión configurable y salidas

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document-pdfAcrobat SN74AVCH8T245 8-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs datasheet (Rev. J) (Inglés) PDF | HTML

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Transceptor de bus de alimentación doble de 8 bits Pin-to-pin upgrade with a wider voltage range and improved performance

SN74AVCH8T245

ACTIVO

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Detalles del producto

Bits (#)

8

Data rate (max) (Mbps)

320

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.2

Vin (max) (V)

3.6

Vout (min) (V)

1.2

Vout (max) (V)

3.6

Applications

GPIO, JTAG, SPI, UART

Features

Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

6.8

Technology family

AVC

Supply current (max) (mA)

0.016

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Bits (#)

8

Data rate (max) (Mbps)

320

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.2

Vin (max) (V)

3.6

Vout (min) (V)

1.2

Vout (max) (V)

3.6

Applications

GPIO, JTAG, SPI, UART

Features

Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

6.8

Technology family

AVC

Supply current (max) (mA)

0.016

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TSSOP (PW)

24

49.92 mm² (7.8 mm × 6.4 mm)

TVSOP (DGV)

24

32 mm² (5 mm × 6.4 mm)

VQFN (RHL)

24

19.25 mm² (5.5 mm × 3.5 mm)

Control inputs (DIR and OE) VIH and VIL levels are referenced to VCCA voltage
Bus hold on data inputs eliminates the need for external pullup or pulldown resistors
VCC isolation feature
Fully configurable dual-rail design
I/Os are 4.6-V tolerant
Ioff supports partial-power-down mode operation
Maximum data rates:
- 320Mbps (VCCA ≥ 1.8V and VCCB ≥ 1.8V)
- 170Mbps (VCCA ≤ 1.8V or VCCB ≤ 1.8V)
Latch-up performance exceeds 100mA per JESD 78, class II
ESD protection exceeds JESD 22:
- 8000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Control inputs (DIR and OE) VIH and VIL levels are referenced to VCCA voltage
Bus hold on data inputs eliminates the need for external pullup or pulldown resistors
VCC isolation feature
Fully configurable dual-rail design
I/Os are 4.6-V tolerant
Ioff supports partial-power-down mode operation
Maximum data rates:
- 320Mbps (VCCA ≥ 1.8V and VCCB ≥ 1.8V)
- 170Mbps (VCCA ≤ 1.8V or VCCB ≤ 1.8V)
Latch-up performance exceeds 100mA per JESD 78, class II
ESD protection exceeds JESD 22:
- 8000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

The SN74AVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The design of SN74AVCH8T245 references the control pins (DIR and OE) to VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. It is not recommended to use pullup or pulldown resistors with the bus-hold circuitry.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device.

The VCC isolation feature allows the outputs to be in the high-impedance state when either VCCA or VCCB is at GND. The bus-hold circuitry on the powered-up side always stays active.

The SN74AVCH8T245 solution is compatible with a single-supply system and can be replaced later with a ’245 function, with minimal printed circuit board redesign.

To put the device in the high-impedance state during power up or power down, OE must be tied to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.