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SN74LVC2G32-Q1

ACTIVO

Compuerta OR automotriz de 2 canal y 2 entradas de 1.65 V a 5.5 V y 32 mA de potencia de accionamien

Detalles del producto

Technology family LVC Number of channels 2 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 2 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C
      Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Inputs Accept Voltages to 5.5 V
  • Max Propagation (Delay) Time of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-µA Max Supply Current
  • ±24-mA Output Drive at 3.3 V
  • Typical Voltage Output Low Peak (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical Voltage Output High Valley (VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Ioff State Current Supports Partial-Power-Down Mode
    Operation
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C
      Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Inputs Accept Voltages to 5.5 V
  • Max Propagation (Delay) Time of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-µA Max Supply Current
  • ±24-mA Output Drive at 3.3 V
  • Typical Voltage Output Low Peak (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical Voltage Output High Valley (VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Ioff State Current Supports Partial-Power-Down Mode
    Operation

This dual two-input positive-OR gate is designed for 1.65-V to 5.5-V collector supply voltage operation.

The SN74LVC2G32-Q1 performs the Boolean function Y = A + B or Y = A\ • B\ in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using the off-state current. The off-state current circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This dual two-input positive-OR gate is designed for 1.65-V to 5.5-V collector supply voltage operation.

The SN74LVC2G32-Q1 performs the Boolean function Y = A + B or Y = A\ • B\ in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using the off-state current. The off-state current circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos Dual 2-input Positive OR gate datasheet 3/08/2012
Más documentación Automotive Logic Devices Brochure 27/08/2014

Diseño y desarrollo

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Placa de evaluación

5-8-LOGIC-EVM — Módulo de evaluación de lógico genérico para encapsulados DCK, DCT, DCU, DRL y DBV,de 5- a 8-pines

EVM flexible diseñado para admitir cualquier dispositivo que tenga un encapsulado DCK, DCT, DCU, DRL o DBV y entre 5 y 8 pines.
Guía del usuario: PDF
Productos y hardware compatibles
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Modelo de simulación

SN74LVC2G32 Behavioral SPICE Model

SCEM612.ZIP (7 KB) - Modelo PSpice
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
VSSOP (DCU) 8 Ultra Librarian

Pedidos y calidad

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