Inicio Lógica y traducción de voltaje Compuertas lógicas Compuertas XOR (OR exclusiva)
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Lógica y traducción de voltaje
Compuertas lógicas
Compuertas XOR (OR exclusiva)

SN74LVC86A-EP

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Puertas XOR (OR exclusivas) de 4 canales, 2 entradas, 2 V a 3.6 V, de producto mejorado

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Hoja de datos

SN74LVC86A-EP

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Detalles del producto

Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm)
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C and –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operates From 2 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.6 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C and –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operates From 2 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.6 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation.

The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation.

The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN74LVC86A-EP datasheet (Rev. B) 25/07/2007
* Informe de radiación y confiabilidad SN74LVC86AMDREP Reliability Report 5/10/2011
* Informe de radiación y confiabilidad SN74LVC86AQDREP Reliability Report 5/10/2011
* VID SN74LVC86A-EP VID V6204670 21/06/2016

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
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