SN74LVCC4245A

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Transceptor de bus octal con tensión de salida ajustable y salidas de 3 estados

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Hoja de datos

document-pdfAcrobat SN74LVCC4245A Octal Dual-Supply Bus Transceiver With Configurable Output Voltage and 3-State Outputs datasheet (Rev. O) (Inglés) PDF | HTML

SN74LVCC4245A

ACTIVO

Hoja de datos

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Detalles del producto

Bits (#)

8

Data rate (max) (Mbps)

200

Topology

Push-Pull

Vin (min) (V)

4.5

Vin (max) (V)

5.5

Vout (min) (V)

2.7

Vout (max) (V)

5.5

Applications

GPIO, JTAG, SPI, UART

Features

Output enable

Prop delay (ns)

7

Technology family

LVC

Supply current (max) (mA)

0.16

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Bits (#)

8

Data rate (max) (Mbps)

200

Topology

Push-Pull

Vin (min) (V)

4.5

Vin (max) (V)

5.5

Vout (min) (V)

2.7

Vout (max) (V)

5.5

Applications

GPIO, JTAG, SPI, UART

Features

Output enable

Prop delay (ns)

7

Technology family

LVC

Supply current (max) (mA)

0.16

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TSSOP (PW)

24

49.92 mm² (7.8 mm × 6.4 mm)

SSOP (DB)

24

63.96 mm² (8.2 mm × 7.8 mm)

SOIC (DW)

24

159.65 mm² (15.5 mm × 10.3 mm)

SOP (NS)

24

117 mm² (15 mm × 7.8 mm)

8-bit direction controlled translating bus transceiver
4.5V to 5.5V on A port and 2.7V to 5.5V on B port
Robust, glitch-free power supply sequencing
VCC isolation and VCC disconnect feature
- If either VCC input is below 100mV or left floating, all I/O outputs are disabled and become high impedance
Control inputs VIH and VIL levels are referenced to VCCA voltage
High drive strength for heavier loads: 24mA drive at 3V supply
Latch-up performance exceeds 250mA per JESD 17
Operating temperature range -40°C to 85°C
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-A)
- 1000V Charged-Device Model (C101)
Compatible with SN74LVC4245

8-bit direction controlled translating bus transceiver
4.5V to 5.5V on A port and 2.7V to 5.5V on B port
Robust, glitch-free power supply sequencing
VCC isolation and VCC disconnect feature
- If either VCC input is below 100mV or left floating, all I/O outputs are disabled and become high impedance
Control inputs VIH and VIL levels are referenced to VCCA voltage
High drive strength for heavier loads: 24mA drive at 3V supply
Latch-up performance exceeds 250mA per JESD 17
Operating temperature range -40°C to 85°C
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-A)
- 1000V Charged-Device Model (C101)
Compatible with SN74LVC4245

This 8-bit (octal) noninverting bus transceiver uses two separate power-supply rails. The A port, VCCA, is dedicated to accepting a 5V supply level, and the configurable B port, which is designed to track VCCB, accepts voltages from 3V to 5V. This allows for translation from a 3.3V to a 5V environment and vice versa.

The SN74LVCC4245A device is designed for asynchronous communication between data buses. The SN74LVCC4245A device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses effectively are isolated. The control circuitry (DIR, OE) is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

This 8-bit (octal) noninverting bus transceiver uses two separate power-supply rails. The A port, VCCA, is dedicated to accepting a 5V supply level, and the configurable B port, which is designed to track VCCB, accepts voltages from 3V to 5V. This allows for translation from a 3.3V to a 5V environment and vice versa.

The SN74LVCC4245A device is designed for asynchronous communication between data buses. The SN74LVCC4245A device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses effectively are isolated. The control circuitry (DIR, OE) is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

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Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Fecha
*	Hoja de datos	SN74LVCC4245A Octal Dual-Supply Bus Transceiver With Configurable Output Voltage and 3-State Outputs datasheet (Rev. O)	PDF \| HTML	29/05/2026
	Nota sobre la aplicación	Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators	PDF \| HTML	2/10/2024
	Nota sobre la aplicación	Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators	PDF \| HTML	12/07/2024
	Nota sobre la aplicación	Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)	PDF \| HTML	3/07/2024
	Guía de selección	Voltage Translation Buying Guide (Rev. A)		15/04/2021

Diseño y desarrollo

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