Inicio Microcontroladores (MCU) y procesadores Procesadores digitales de señales (DSP)
Inicio
Microcontroladores (MCU) y procesadores
Procesadores digitales de señales (DSP)

TMS320C40

NO RECOMENDADO PARA NUEVOS DISEÑOS

Procesadores de señal digital

Haga su pedido ahora
Hoja de datos
TMS320C40 no se recomienda para nuevos diseños
Aunque esta producto sigue en producción para dar soporte a diseños anteriores, no lo recomendamos para nuevos diseños. Considere una de estas alternativas:
open-in-new Comparar alternativas
Funcionalidad similar a la del dispositivo comparado
TMS320C6747 ACTIVO DSP de punto flotante C674x de 456 MHz y baja potencia, con PBGA This product is a newer generation of floating point DSPs with higher performance & improved connectivity options.

TMS320C40

NO RECOMENDADO PARA NUEVOS DISEÑOS
Hoja de datos Haga su pedido ahora

Detalles del producto

DSP (max) (MHz) 50, 60 Rating Military Operating temperature range (°C) to
DSP (max) (MHz) 50, 60 Rating Military Operating temperature range (°C) to
CPGA (GF) 325 2232.5625 mm² 47.25 x 47.25
  • Highest Performance Floating-Point Digital Signal Processor (DSP)
    • '320C40-60:
      33-ns Instruction Cycle Time,
      330 MOPS, 60 MFLOPS,
      30 MIPS, 384M Bytes/s
    • '320C40-50:
      40-ns Instruction Cycle Time
    • '320C40-40:
      50-ns Instruction Cycle Time
  • Six Communications Ports
  • Six-Channel Direct Memory Access (DMA) Coprocessor
  • Single-Cycle Conversion to and From IEEE-754 Floating-Point Format
  • Single Cycle, 1/x, 1/
  • Source-Code Compatible With TMS320C3x
  • Single-Cycle 40-Bit Floating-Point,
    32-Bit Integer Multipliers
  • Twelve 40-Bit Registers, Eight Auxiliary Registers, 14 Control Registers, and Two Timers
  • IEEE 1149.1 (JTAG) Boundary Scan Compatible
  • Two Identical External Data and Address Buses Supporting Shared Memory Systems and High Data-Rate, Single-Cycle Transfers:
    • High Port-Data Rate of 120M Bytes/s ('C40-60) (Each Bus)
    • 16G-Byte Continuous Program/Data/Peripheral Address Space
    • Memory-Access Request for Fast, Intelligent Bus Arbitration
    • Separate Address-Bus, Data-Bus, and Control-Enable Pins
    • Four Sets of Memory-Control Signals Support Different Speed Memories in Hardware
  • 325-Pin Ceramic Grid Array (GF Suffix)
  • Fabricated Using 0.72-um Enhanced Performance Implanted CMOS (EPICTM) Technology by Texas Instruments (TITM)
  • Software-Communication-Port Reset
  • NMI\ With Bus-Grant Feature
  • Separate Internal Program, Data, and DMA Coprocessor Buses for Support of Massive Concurrent Input/Output (I/O) of Program and Data Throughput, Maximizing Sustained Central Processing Unit (CPU) Performance
  • On-Chip Program Cache and Dual-Access/Single-Cycle RAM for Increased Memory-Access Performance
    • 512-Byte Instruction Cache
    • 8K Bytes of Single-Cycle Dual-Access Program or Data RAM
    • ROM-Based Boot Loader Supports Program Bootup Using 8-, 16-, or 32-Bit Memories or One of the Communication Ports
  • IDLE2 Clock-Stop Power-Down Mode
  • 5-V Operation

    IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary-Scan Architecture
    EPIC and TI are trademarks of Texas Instruments Incorporated.
  • Highest Performance Floating-Point Digital Signal Processor (DSP)
    • '320C40-60:
      33-ns Instruction Cycle Time,
      330 MOPS, 60 MFLOPS,
      30 MIPS, 384M Bytes/s
    • '320C40-50:
      40-ns Instruction Cycle Time
    • '320C40-40:
      50-ns Instruction Cycle Time
  • Six Communications Ports
  • Six-Channel Direct Memory Access (DMA) Coprocessor
  • Single-Cycle Conversion to and From IEEE-754 Floating-Point Format
  • Single Cycle, 1/x, 1/
  • Source-Code Compatible With TMS320C3x
  • Single-Cycle 40-Bit Floating-Point,
    32-Bit Integer Multipliers
  • Twelve 40-Bit Registers, Eight Auxiliary Registers, 14 Control Registers, and Two Timers
  • IEEE 1149.1 (JTAG) Boundary Scan Compatible
  • Two Identical External Data and Address Buses Supporting Shared Memory Systems and High Data-Rate, Single-Cycle Transfers:
    • High Port-Data Rate of 120M Bytes/s ('C40-60) (Each Bus)
    • 16G-Byte Continuous Program/Data/Peripheral Address Space
    • Memory-Access Request for Fast, Intelligent Bus Arbitration
    • Separate Address-Bus, Data-Bus, and Control-Enable Pins
    • Four Sets of Memory-Control Signals Support Different Speed Memories in Hardware
  • 325-Pin Ceramic Grid Array (GF Suffix)
  • Fabricated Using 0.72-um Enhanced Performance Implanted CMOS (EPICTM) Technology by Texas Instruments (TITM)
  • Software-Communication-Port Reset
  • NMI\ With Bus-Grant Feature
  • Separate Internal Program, Data, and DMA Coprocessor Buses for Support of Massive Concurrent Input/Output (I/O) of Program and Data Throughput, Maximizing Sustained Central Processing Unit (CPU) Performance
  • On-Chip Program Cache and Dual-Access/Single-Cycle RAM for Increased Memory-Access Performance
    • 512-Byte Instruction Cache
    • 8K Bytes of Single-Cycle Dual-Access Program or Data RAM
    • ROM-Based Boot Loader Supports Program Bootup Using 8-, 16-, or 32-Bit Memories or One of the Communication Ports
  • IDLE2 Clock-Stop Power-Down Mode
  • 5-V Operation

    IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary-Scan Architecture
    EPIC and TI are trademarks of Texas Instruments Incorporated.

The '320C40 digital signal processors (DSPs) are 32-bit, floating-point processors manufactured in 0.72-um, double-level metal CMOS technology. The '320C40 is a part of the fourth generation of DSPs from Texas Instruments and is designed primarily for parallel processing.

The '320C40 digital signal processors (DSPs) are 32-bit, floating-point processors manufactured in 0.72-um, double-level metal CMOS technology. The '320C40 is a part of the fourth generation of DSPs from Texas Instruments and is designed primarily for parallel processing.
open-in-new Buscar otro/a Procesadores digitales de señales (DSP)
Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 33
Tipo Título Fecha
* Data sheet Digital Signal Processor datasheet 01 ene 1996
Application note 320C3x, 320C4x, and 320MCM42x Power-Up Sensitivity at Cold Temperatures (Rev. D) 06 ago 2004
User guide TMS320C3x/C4x Assembly Language Tools User's Guide (Rev. D) 16 abr 1998
User guide TMS320C3x/C4x Optimizing C Compiler User's Guide (Rev. H) 14 abr 1998
Application note Implementing Continuously Programmable Digital Filters w/ TMS320C30/40 DSP (Rev. A) 01 ago 1997
Application note Predator: A Posture Tracking System 01 ago 1997
Application note A Hardware Monitor Using TMS320C40 Analysis Module & JTAG for Perf Measurements 01 jul 1997
Application note Creating an Interactive Simulation Environment Using TMS320C40 Multi-DSP System 01 jul 1997
Application note Digital Monopulse Doppler Radar and DSP Teaching 01 jul 1997
Application note EDRAM Controller for the 60MHz TMS320C40 DSP 01 jul 1997
Application note Implementing a Digital Tracker for Monopulse Radar Using the TMS320C40 DSP 01 jul 1997
Application note Implementing a Real-Time Application on a TMS320C40 Multi-DSP 01 jul 1997
Application note A Novel Way of Using TMS320C40 Cache 01 jun 1997
Application note A Simple Way to Terminate Unused TMS320C40 Comm Ports 01 jun 1997
Application note Designing With TMS320C40 Comm Ports: Part 1 01 jun 1997
Application note Fast Logarithms on a Floating-Point Device 01 jun 1997
Application note TMS320C40 Boot Loader Selection 01 jun 1997
Application note TMS320C40 DMA Memory Transfer Timing 01 jun 1997
Application note TMS320C40 Emulator TIPs 01 jun 1997
Application note Video Restoration on a Multiple TMS320C40 System 01 nov 1996
Application note Design of Active Noise Control Systems With the TMS320 Family 01 jun 1996
User guide JTAG/MPSD Emulation Technical Reference (Rev. A) 01 dic 1994
Application note Setting Up TMS320 DSP Interrupts in 'C' 01 nov 1994
User guide TMS320C4x Parallel Runtime Support Library User's Guide (Rev. A) 01 oct 1994
User guide TMS320C4x Parallel Processing Development System Technical Reference (Rev. A) 08 abr 1994
Application note Parallel 2-D FFT Implementation With TMS320C4x DSPs (Rev. A) 01 feb 1994
Application note Parallel Digital Signal Processing With the TMS320C40 01 feb 1994
Application note Parallel Processing With TMS320C4x 01 feb 1994
Application note Prototyping the TI TMS320C40 to the Cypress VIC068/VAC068 VME Interface 01 feb 1994
Application note Transmission of Still and Moving Images Over Narrowband Channels 01 feb 1994
Application note Calculation of TMS320C40 Power Dissipation 01 nov 1993
User guide Parallel Debug Mgr Addendum to TMS320C4x & TMS320C5x C Source Debugger UGs 01 abr 1993
User guide TMS320C4x C Source Debugger User's Guide 01 may 1992

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Soporte de software

TMDS3240130SP2 — Download TMS320C3x/C4x Code Composer v4.1 Service Pack 2

Additional Information


Code Composer v4 was the last release of the Code Composer IDE that supported older digital signal processors such as TMS320C3x/4x and TMS320C2x/C5x.  There were different versions for these families. These products are no longer available for purchase or download. (...)

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Procesadores digitales de señales (DSP)
TMS320C40 — Procesadores de señal digital
Descargar
Modelo de simulación

C40 GFL BSDL Model

SPRM168.ZIP (6 KB) - BSDL Model
Descargar
Herramienta de diseño

PROCESSORS-3P-SEARCH — MPU basada en Arm, MCU basada en Arm y herramienta de búsqueda de terceros DSP

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Descargar
Paquete Pasadores Descargar
CPGA (GF) 325 Ver opciones
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos