Detalles del producto

Digital audio interface DSP, I2S, L, R, TDM Rating Catalog Features Beep generator, MiniDSP, Phase-locked loop (PLL), Stereo Class-D amplifier Operating temperature range (°C) -40 to 85
Digital audio interface DSP, I2S, L, R, TDM Rating Catalog Features Beep generator, MiniDSP, Phase-locked loop (PLL), Stereo Class-D amplifier Operating temperature range (°C) -40 to 85
VQFN (RGZ) 48 49 mm² 7 x 7
  • Low-Power 13-mW Stereo 48-kHz Playback
  • Stereo Audio DAC and Monaural ADC Support 8-kHz to 192-kHz Sample Rates
  • Instruction-Programmable miniDSP Available for Record and Playback Paths
  • Bass Boost/Treble/EQ With up to Five Biquads for Record and up to Six Biquads for Playback
  • Stereo 1.29-W Class-D BTL 8-Ω Speaker Driver With Direct Battery Connection
  • Smart Four-Wire Touch-Screen Controller With Autonomous Timing
  • Programmable-Gain Amplifiers
  • Microphone Bias
  • Hardware-Implemented AGC Used With Microphone Input for Audio ADC Path
  • Digital Microphone Interface
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Programmable 12-Bit SAR ADC
  • Built-In Capability for Temperature, Battery, or Auxiliary Measurements
  • Programmable DRC for Digital Playback
  • Sine-Wave Generator for Beep Generator for Touch-Pad Press Acknowledgement
  • Integrated PLL Used for Programmable Digital Audio Processor
  • SPI, I2C, and I2S Serial Interfaces
  • SPI , I2C Have Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SLVDD and SRVDD ≥ AVDD)
  • 7-mm × 7-mm 48-QFN Package
  • APPLICATIONS
    • Portable Gaming Devices
    • Mobile Internet Devices
    • Adaptive Filtering Applications

All other trademarks are the property of their respective owners

  • Low-Power 13-mW Stereo 48-kHz Playback
  • Stereo Audio DAC and Monaural ADC Support 8-kHz to 192-kHz Sample Rates
  • Instruction-Programmable miniDSP Available for Record and Playback Paths
  • Bass Boost/Treble/EQ With up to Five Biquads for Record and up to Six Biquads for Playback
  • Stereo 1.29-W Class-D BTL 8-Ω Speaker Driver With Direct Battery Connection
  • Smart Four-Wire Touch-Screen Controller With Autonomous Timing
  • Programmable-Gain Amplifiers
  • Microphone Bias
  • Hardware-Implemented AGC Used With Microphone Input for Audio ADC Path
  • Digital Microphone Interface
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Programmable 12-Bit SAR ADC
  • Built-In Capability for Temperature, Battery, or Auxiliary Measurements
  • Programmable DRC for Digital Playback
  • Sine-Wave Generator for Beep Generator for Touch-Pad Press Acknowledgement
  • Integrated PLL Used for Programmable Digital Audio Processor
  • SPI, I2C, and I2S Serial Interfaces
  • SPI , I2C Have Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SLVDD and SRVDD ≥ AVDD)
  • 7-mm × 7-mm 48-QFN Package
  • APPLICATIONS
    • Portable Gaming Devices
    • Mobile Internet Devices
    • Adaptive Filtering Applications

All other trademarks are the property of their respective owners

The TSC2117 is a low-power, highly integrated, high-performance codec and touch-screen controller which features stereo class-D speaker amplifiers, a stereo audio DAC, mono audio ADC, and a SAR ADC.

The TSC2117 supports 16-bit stereo playback and monaural record functionality. The device integrates several analog features, such as a microphone interface, headphone drivers, and speaker drivers. The TSC2117 has two fully programmable miniDSPs for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ are supported by the preprogrammed modes of the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled by either a pin control or by register control.

The TSC2117 has a 12-bit SAR ADC converter that supports a four-wire resistive touch-screen complete with drivers. All functions can be controlled by an I2C or SPI interface. A programmable beep generator is included. An on-chip processor is used in the touch-screen mode and provides extensive features specifically designed to reduce the host-processor and interface-bus overhead. The TSC2117 has three dedicated analog inputs for system voltage measurements, with an on-chip temperature sensor that can be read by the SAR ADC, and is available in a 7-mm × 7-mm 48-pin QFN package.

This data manual is designed using PDF document-viewing features that allow quick access to information. For example, performing a global search on, e.g., "page 0/register 15" produces all references to this page and register in a list. This makes is easy to traverse the list and find all information related to a page and register. Note that the search string must be of the indicated format. Also, this document includes document hyperlinks to allow the user to quickly find a document reference. To come back to the original page, click the green left arrow near the PDF page number at the bottom of the file. The hot-key for this function is alt-left arrow on the keyboard. Another way to find information quickly is to use the PDF bookmarks.

The TSC2117 is a low-power, highly integrated, high-performance codec and touch-screen controller which features stereo class-D speaker amplifiers, a stereo audio DAC, mono audio ADC, and a SAR ADC.

The TSC2117 supports 16-bit stereo playback and monaural record functionality. The device integrates several analog features, such as a microphone interface, headphone drivers, and speaker drivers. The TSC2117 has two fully programmable miniDSPs for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ are supported by the preprogrammed modes of the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled by either a pin control or by register control.

The TSC2117 has a 12-bit SAR ADC converter that supports a four-wire resistive touch-screen complete with drivers. All functions can be controlled by an I2C or SPI interface. A programmable beep generator is included. An on-chip processor is used in the touch-screen mode and provides extensive features specifically designed to reduce the host-processor and interface-bus overhead. The TSC2117 has three dedicated analog inputs for system voltage measurements, with an on-chip temperature sensor that can be read by the SAR ADC, and is available in a 7-mm × 7-mm 48-pin QFN package.

This data manual is designed using PDF document-viewing features that allow quick access to information. For example, performing a global search on, e.g., "page 0/register 15" produces all references to this page and register in a list. This makes is easy to traverse the list and find all information related to a page and register. Note that the search string must be of the indicated format. Also, this document includes document hyperlinks to allow the user to quickly find a document reference. To come back to the original page, click the green left arrow near the PDF page number at the bottom of the file. The hot-key for this function is alt-left arrow on the keyboard. Another way to find information quickly is to use the PDF bookmarks.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Audio Codec with Embedded miniDSP, Stereo Class-D Speaker Amplifier datasheet (Rev. B) 07 jun 2012
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 25 ene 2012
Application note Using the AGC,DRC and Beep generator Function in TLV320AIC3204/3254/3100/3110/31 03 mar 2010
EVM User's guide TSC2117EVM-K User's Guide 27 abr 2009

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

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VQFN (RGZ) 48 Ver opciones

Pedidos y calidad

Información incluida:
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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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