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CY54FCT543T

アクティブ

3 ステート出力、オクタル、レジスタ内蔵トランシーバ

ご注文はこちら
データシート
ユーザー ガイド

CY54FCT543T

アクティブ
データシート ご注文はこちら

製品詳細

Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -12 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Military Operating temperature range (°C) -55 to 125
Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -12 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Military Operating temperature range (°C) -55 to 125
LCCC (FK) 28 130.6449 mm² (— mm × — mm) CDIP (JT) 24 221.44 mm² (— mm × — mm)
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Separation Controls for Data Flow in Each Direction
  • Back-to-Back Latches for Storage
  • CY54FCT543T
    • 48-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT543T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Separation Controls for Data Flow in Each Direction
  • Back-to-Back Latches for Storage
  • CY54FCT543T
    • 48-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT543T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses CEBA\, LEBA\, and OEBA\ inputs.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses CEBA\, LEBA\, and OEBA\ inputs.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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技術資料

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート 8-Bit Latched Registered Transceivers With 3-State Outputs データシート (Rev. A) 2001/10/01
* ユーザー・ガイド CYFCT Parameter Measurement Information 2001/04/02
* SMD CY54FCT543T SMD 5962-92221 2016/06/21

設計と開発

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パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
LCCC (FK) 28 Ultra Librarian
CDIP (JT) 24 Ultra Librarian
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