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SN54ABT623A

アクティブ
ご注文はこちら
データシート

SN54ABT623A

アクティブ
データシート ご注文はこちら

製品詳細

Technology family ABT Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Supply current (max) (µA) 30000 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family ABT Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Supply current (max) (µA) 30000 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 20 167.464 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm)
  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (JT) DIPs

EPIC-IIB is a trademark of Texas Instruments Incorporated.
  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (JT) DIPs

EPIC-IIB is a trademark of Texas Instruments Incorporated.

The SN54ABT623A and SN74ABT623 bus transceivers are designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The SN54ABT623A and SN74ABT623 provide true data at their outputs.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA\) inputs.

The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states.

To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT623A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT623 is characterized for operation from -40°C to 85°C.

The SN54ABT623A and SN74ABT623 bus transceivers are designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The SN54ABT623A and SN74ABT623 provide true data at their outputs.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA\) inputs.

The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states.

To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT623A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT623 is characterized for operation from -40°C to 85°C.

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート Octal Bus Transceivers With 3-State Outputs データシート (Rev. D) 1997/05/01
* SMD SN54ABT623A SMD 5962-94618 2016/06/21

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CDIP (J) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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