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SN54LVTH16244A

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ご注文はこちら
データシート

SN54LVTH16244A

アクティブ
データシート ご注文はこちら

製品詳細

Technology family LVT Number of channels 16 IOL (max) (mA) 48 Supply current (max) (µA) 5000 IOH (max) (mA) -25 Input type TTL-Compatible CMOS Output type 3-State Features Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family LVT Number of channels 16 IOL (max) (mA) 48 Supply current (max) (µA) 5000 IOH (max) (mA) -25 Input type TTL-Compatible CMOS Output type 3-State Features Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
CFP (WD) 48 153.4008 mm² (— mm × — mm)
  • Members of the Texas Instruments Widebus Family
  • State-of-the-Art Advanced BiCMOS
    Technology (ABT) Design for 3.3-V
    Operation and Low Static-Power
    Dissipation
  • Support Mixed-Mode Signal Operation
    (5-V Input and Output Voltages With
    3.3-V VCC)
  • Support Unregulated Battery Operation
    Down to 2.7 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot
    Insertion
  • Bus Hold on Data Inputs Eliminates the Need
    for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • Members of the Texas Instruments Widebus Family
  • State-of-the-Art Advanced BiCMOS
    Technology (ABT) Design for 3.3-V
    Operation and Low Static-Power
    Dissipation
  • Support Mixed-Mode Signal Operation
    (5-V Input and Output Voltages With
    3.3-V VCC)
  • Support Unregulated Battery Operation
    Down to 2.7 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot
    Insertion
  • Bus Hold on Data Inputs Eliminates the Need
    for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE)  inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE)  inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS, SNx4LVTH16244A データシート (Rev. U) 2013/10/11
* SMD SN54LVTH16244A SMD 5962-96685 2016/06/21

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