SN74ALS137A
- Combines Decoder and 3-Bit Address Latch
- Incorporates Two Output Enables to Simplify Cascading
- Package Options Include Plastic Small- Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
The SN54ALS137A, SN74ALS137A, and SN74AS137 are 3-line to 8-line
decoders/demultiplexers with latches on the three address inputs.
When the latch-enable (
)
input is low, the devices act as decoders/demultiplexers. When goes from low to high, the address
present at the select (A, B, and C) inputs is stored in the latches.
Further address changes are ignored as long as remains high. The output-enable
controls (G1 and G2\) control the outputs independently of the select
or latch-enable inputs. All of the outputs are forced high if G1 is
low or G2\ is high. These devices are ideally suited for implementing
glitch-free decoders in strobed (stored-address) applications in
bus-oriented systems.
The SN54ALS137A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS137A and SN74AS137 are characterized for operation from 0°C to 70°C.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | 3-Line To 8-Line Decoders/Demultiplexers With Address Latches データシート (Rev. C) | 1995/01/01 |