SN74AS280

アクティブ

9 ビット、パリティ ジェネレータ / チェッカ

製品詳細

Technology family AS Bits (#) 9 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family AS Bits (#) 9 Rating Catalog Operating temperature range (°C) 0 to 70
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm)
  • Generate Either Odd or Even Parity for Nine Data Lines
  • Cascadable for n-Bit Parity
  • Can Be Used to Upgrade Existing Systems Using MSI Parity Circuits
  • Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs
  • Generate Either Odd or Even Parity for Nine Data Lines
  • Cascadable for n-Bit Parity
  • Can Be Used to Upgrade Existing Systems Using MSI Parity Circuits
  • Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs

These universal 9-bit parity generators/checkers utilize advanced Schottky high-performance

circuitry and feature odd ( ODD) and even ( EVEN) outputs to facilitate operation of either odd- or even-parity applications. The word-length capability is easily expanded by cascading.

These devices can be used to upgrade the performance of most systems utilizing the SN74ALS180 and SN74AS180 parity generators/checkers. Although the SN74ALS280 and SN74AS280 are implemented without expander inputs, the corresponding function is provided by the availability of an input (I) at terminal 4 and the absence of any internal connection at terminal 3. This permits the SN74ALS280 and SN74AS280 to be substituted for the SN74ALS180 and SN74AS180 in existing designs to produce an identical function even if the devices are mixed with existing SN74ALS180 and SN74AS180 devices.

All SN74AS280 inputs are buffered to lower the drive requirements.

The SN74ALS280 and SN74AS280 are characterized for operation from 0°C to 70°C.

 

 

These universal 9-bit parity generators/checkers utilize advanced Schottky high-performance

circuitry and feature odd ( ODD) and even ( EVEN) outputs to facilitate operation of either odd- or even-parity applications. The word-length capability is easily expanded by cascading.

These devices can be used to upgrade the performance of most systems utilizing the SN74ALS180 and SN74AS180 parity generators/checkers. Although the SN74ALS280 and SN74AS280 are implemented without expander inputs, the corresponding function is provided by the availability of an input (I) at terminal 4 and the absence of any internal connection at terminal 3. This permits the SN74ALS280 and SN74AS280 to be substituted for the SN74ALS180 and SN74AS180 in existing designs to produce an identical function even if the devices are mixed with existing SN74ALS180 and SN74AS180 devices.

All SN74AS280 inputs are buffered to lower the drive requirements.

The SN74ALS280 and SN74AS280 are characterized for operation from 0°C to 70°C.

 

 

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート 9-Bit Parity Generators/Checkers データシート (Rev. C) 1994/12/01

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