SN74AUC32

アクティブ

4 チャネル、2 入力、0.8V ～ 2.7V、超高速 (2.4ns)、OR ゲート

ご注文はこちら

データシート

document-pdfAcrobat SN74AUC32 データシート (Rev. A) (英語)

SN74AUC32

アクティブ

データシート

ご注文はこちら

製品詳細

Technology family

AUC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

VQFN (RGY)

12.25 mm² (3.5 mm × 3.5 mm)

Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 2.2 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 2.2 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

This quadruple 2-input positive-OR gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC32 device performs the Boolean function Y = A•B or Y = (A\ • B\)\ in positive logic.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This quadruple 2-input positive-OR gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC32 device performs the Boolean function Y = A•B or Y = (A\ • B\)\ in positive logic.

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