SN74LVC8T245-EP
- Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
- VCC Isolation Feature – If Either VCC Input Is at GND, All Are in the High-Impedance State
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245-EP is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
The SN74LVC8T245-EP is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74LVC8T245-EP is designed so that the control pins (DIR and OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, all outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | SN74LVC8T245-EP 8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs データシート (Rev. A) | PDF | HTML | 2017/03/02 | ||
| * | 放射線と信頼性レポート | CLVC1G126IDCKREP Reliability Report | 2018/01/25 | |||
| * | 放射線と信頼性レポート | SN74LVC8T245MPWREP Reliability Report | 2015/02/06 | |||
| * | 放射線と信頼性レポート | SN74LVC8T245MPWREP Reliability Report | 2011/08/31 | |||
| * | VID | SN74LVC8T245-EP VID V6209615 | 2016/06/21 | |||
| アプリケーション・ノート | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/02 | |||
| アプリケーション・ノート | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/07/12 | |||
| アプリケーション・ノート | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/07/03 | |||
| アプリケーション概要 | Voltage Translation for Rugged High Reliability Applications | PDF | HTML | 2021/07/20 | |||
| セレクション・ガイド | Voltage Translation Buying Guide (Rev. A) | 2021/04/15 |
設計と開発
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| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| SOIC (DW) | 24 | Ultra Librarian |
| TSSOP (PW) | 24 | Ultra Librarian |
| VQFN (RHL) | 24 | Ultra Librarian |