ADC0820-N
- Built-In Track-and-Hold Function
- No Missing Codes
- No External Clocking
- Single Supply—5 VDC
- Easy Interface to All Microprocessors, or Operates Stand-Alone
- Latched TRI-STATE Output
- Logic Inputs and Outputs Meet Both MOS and T2L Voltage Level Specifications
- Operates Ratiometrically or with any Reference Value Equal to or Less than VCC
- 0V to 5V Analog Input Voltage Range with Single 5V Supply
- No Zero or Full-Scale Adjust Required
- Overflow Output Available for Cascading
- 0.3 in. Standard Width 20-Pin PDIP
- 20-Pin PLCC
- 20-Pin SOIC
Key Specifications
- Resolution: 8 Bits
- Conversion Time
- 2.5 µs Max (RD Mode)
- 1.5 µs Max (WR-RD Mode)
- Low Power: 75 mW Max
- Total Unadjusted Error: ±½ LSB and ± 1 LSB
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By using a half-flash conversion technique, the 8-bit ADC0820-N CMOS A/D offers a 1.5 µs conversion time and dissipates only 75 mW of power. The half-flash technique consists of 32 comparators, a most significant 4-bit ADC and a least significant 4-bit ADC.
The input to the ADC0820-N is tracked and held by the input sampling circuitry eliminating the need for an external sample-and-hold for signals moving at less than 100 mV/µs.
For ease of interface to microprocessors, the ADC0820-N has been designed to appear as a memory location or I/O port without the need for external interfacing logic.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | ADC0820 8-Bit High Speed uP Compatible A/D Converter with Track/Hold Function datasheet (Rev. C) | 2013. 3. 25 | ||
| e북 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015. 5. 21 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (DW) | 20 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.