홈 데이터 컨버터 아날로그-디지털 컨버터(ADC) 고속 ADC(≥10 MSPS)
홈
데이터 컨버터
아날로그-디지털 컨버터(ADC)
고속 ADC(≥10 MSPS)

ADC08B200

활성

1K 버퍼를 갖춘 8비트, 200MSPS 아날로그-디지털 컨버터(ADC)

지금 주문하기
데이터 시트

ADC08B200

활성
데이터 시트 지금 주문하기

제품 상세 정보

Sample rate (max) (Msps) 200 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 500 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.6 Power consumption (typ) (mW) 543 Architecture Pipeline SNR (dB) 47 ENOB (Bits) 7.4 SFDR (dB) 56 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 200 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 500 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1.6 Power consumption (typ) (mW) 543 Architecture Pipeline SNR (dB) 47 ENOB (Bits) 7.4 SFDR (dB) 56 Operating temperature range (°C) -40 to 105 Input buffer No
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • Single-Ended Input
  • Selectable Capture Buffer Size
  • PLL for Clock Multiplication
  • Reference Ladder Top and Bottom Accessible
  • Linear Power Scaling with Sample Rate
  • FPGA Training Pattern
  • AEC-Q100 Grade 2 Qualified
  • Power-Down Feature

Key Specifications

    (PLL Bypassed)

  • Resolution 8 Bits
  • Maximum Sampling Frequency 200 MSPS (min)
  • DNL ±0.4 LSB (typ)
  • ENOB (fIN= 49 MHz) 7.2 bits (typ)
  • THD (fIN= 49 MHz) −53 dBc (typ)
  • Power Consumption
    • Operating (50 MHz) Input 2 mW / Msps (typ)
    • Power Down 2.15 mW (typ)

All trademarks are the property of their respective owners.

  • Single-Ended Input
  • Selectable Capture Buffer Size
  • PLL for Clock Multiplication
  • Reference Ladder Top and Bottom Accessible
  • Linear Power Scaling with Sample Rate
  • FPGA Training Pattern
  • AEC-Q100 Grade 2 Qualified
  • Power-Down Feature

Key Specifications

    (PLL Bypassed)

  • Resolution 8 Bits
  • Maximum Sampling Frequency 200 MSPS (min)
  • DNL ±0.4 LSB (typ)
  • ENOB (fIN= 49 MHz) 7.2 bits (typ)
  • THD (fIN= 49 MHz) −53 dBc (typ)
  • Power Consumption
    • Operating (50 MHz) Input 2 mW / Msps (typ)
    • Power Down 2.15 mW (typ)

All trademarks are the property of their respective owners.

The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to 1,024 bytes that allows fast capture of an input signal with a slower readout rate. An on-chip clock PLL circuit provides the option of on-chip clock rate multiplication to provide the high speed sampling clock.

The ADC08B200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08B200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 2.7V to 3.3V logic. The digital inputs and outputs are low voltage TTL/CMOS compatible and the output data format is straight binary.

The ADC08B200Q runs on an Automotive Grade Flow and is AEC-Q100 Grade 2 Qualified.

The ADC08B200 is offered in a 48-pin plastic package (TQFP) and is specified over the extended industrial temperature range of −40°C to +105°C. An evaluation board is available to assist in the easy evaluation of the ADC08B200.

The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to 1,024 bytes that allows fast capture of an input signal with a slower readout rate. An on-chip clock PLL circuit provides the option of on-chip clock rate multiplication to provide the high speed sampling clock.

The ADC08B200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08B200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 2.7V to 3.3V logic. The digital inputs and outputs are low voltage TTL/CMOS compatible and the output data format is straight binary.

The ADC08B200Q runs on an Automotive Grade Flow and is AEC-Q100 Grade 2 Qualified.

The ADC08B200 is offered in a 48-pin plastic package (TQFP) and is specified over the extended industrial temperature range of −40°C to +105°C. An evaluation board is available to assist in the easy evaluation of the ADC08B200.
filter 기타 고속 ADC(≥10 MSPS) 찾기
다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
2개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer datasheet (Rev. F) 2013. 4. 2
애플리케이션 노트 Adaptive Speed Control for Automotive Systems 2007. 11. 20

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 핀 CAD 기호, 풋프린트 및 3D 모델
TQFP (PFB) 48 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상