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The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.
The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.
The ADS5421 is available in a small LQFP-64 package.
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 날짜 |
|---|---|---|---|---|
| * | Data sheet | 14-Bit, 40MHz Sampling Analog-to-Digital Converter datasheet (Rev. E) | 2005/06/22 | |
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015/05/22 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013/07/19 | ||
| Application note | High-Speed, Analog-to-Digital Converter Basics | 2012/01/11 | ||
| Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/09/10 | ||
| Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/04/28 | ||
| Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/06/08 | ||
| Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/06/02 |
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| LQFP (PM) | 64 | Ultra Librarian |
Analog Engineer's Calc Installer
General calculator tool for analog design support.