CD4066B
- 15V digital or ±7.5V peak-to-peak switching
- 125Ω typical on-state resistance for 15V operation
- Switch on-state resistance matched to within 5Ω over 15V signal-input range
- On-state resistance flat over full peak-to-peak signal range
- High on or off output-voltage ratio: 80dB typical at fis = 10kHz, RL = 1kΩ
- High degree of linearity: <0.5% distortion typical at fis = 1kHz, Vis = 5Vp-p VDD – VSS ≥ 10V, RL = 10kΩ
- Extremely low off-state switch leakage, resulting in very low offset current and high effective off-state resistance: 10 pA typical at VDD – VSS = 10V, TA = 25°C
- Extremely high control input impedance (control circuit isolated from signal circuit): 1012Ω typical
- Low crosstalk between switches: –50dB typical at fis = 8MHz, RL = 1kΩ
- Matched control-input to signal-output capacitance: reduces output signal transients
- Frequency response, switch On = 40MHz typical
- 100% tested for quiescent current at 20V
- 5V, 10V, and 15V parametric ratings
The CD4066B device is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B device, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range.
The CD4066B device consists of four bilateral switches, each with independent controls. Wide operating supply of 3V to 18V allows for use in a broad array of applications. The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B device is recommended.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | CD4066B CMOS Quad Bilateral Switch datasheet (Rev. J) | PDF | HTML | 2024/08/09 |
| Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/06/02 | |
| Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/01 | |
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| User guide | Signal Switch Data Book (Rev. A) | 2003/11/14 | ||
| Application note | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001/12/03 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| PDIP (N) | 14 | Ultra Librarian |
| SOIC (D) | 14 | Ultra Librarian |
| SOP (NS) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.