CD74HC109

Name: CD74HC109
Brand: TI
SKU: CD74HC109
Price: 0.299 USD

활성

설정 및 리셋을 지원하는 고속 CMOS 로직 듀얼 양극 에지 트리거 J-K 플립플롭

지금 주문

데이터 시트

document-pdfAcrobat CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 datasheet (Rev. E) (영어)

CD74HC109

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

Technology family

Supply voltage (min) (V)

Supply voltage (max) (V)

Input type

LVTTL/CMOS

Output type

Push-Pull

Clock frequency (MHz)

Supply current (max) (µA)

IOL (max) (mA)

IOH (max) (mA)

-6

Features

Balanced outputs, Clear, High speed (tpd 10-50ns), Positive edge triggered, Positive input clamp diode, Preset

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Number of channels

Technology family

Supply voltage (min) (V)

Supply voltage (max) (V)

Input type

LVTTL/CMOS

Output type

Push-Pull

Clock frequency (MHz)

Supply current (max) (µA)

IOL (max) (mA)

IOH (max) (mA)

-6

Features

Balanced outputs, Clear, High speed (tpd 10-50ns), Positive edge triggered, Positive input clamp diode, Preset

Operating temperature range (°C)

-55 to 125

Rating

Catalog

PDIP (N)

181.42 mm² 19.3 x 9.4

SOIC (D)

59.4 mm² 9.9 x 6

Asynchronous Set and Reset
Schmitt Trigger Clock Inputs
Typical f_MAX = 54MHz at V_CC = 5V, C_L = 15pF, A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

Asynchronous Set and Reset
Schmitt Trigger Clock Inputs
Typical f_MAX = 54MHz at V_CC = 5V, C_L = 15pF, A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).

The flip-flop is set and reset by active-low S\ and R\, respectively. A low on both the set and reset inputs simultaneously will force both Q and Q\ outputs high. However, both set and reset going high simultaneously results in an unpredictable output condition.

The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).

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