패키징 정보
| 패키지 | 핀 VQFN (RGZ) | 48 |
| 작동 온도 범위(°C) -40 to 105 |
| 패키지 수량 | 캐리어 2,500 | LARGE T&R |
DS90UB954-Q1의 주요 특징
- AEC-Q100 qualified for automotive applications
- Device temperature grade 2: –40℃ to +105℃ ambient operating temperature range
- Dual deserializer hub aggregates one or two active sensors over FPD-Link III interface
- Power-Over-Coax (PoC) compatible transceiver
- MIPI DPHY Version 1.2 / CSI-2 Version 1 .3 compliant
- CSI-2 output ports
- Supports 1, 2, 3, 4 data lanes
- CSI-2 data rate scalable for 400 Mbps / 800 Mbps / 1.5 Gbps / 1.6 Gbps each data lane
- Programmable data types
- Four virtual channels
- ECC and CRC generation
- 2x2 Output replication mode
- Ultra-low data and control path latency
- Supports single-ended coaxial or Shielded Twisted-Pair (STP) cable
- Adaptive receive equalization
- I2C with fast-mode plus up to 1 Mbps
- Flexible GPIOs for camera synchronization and diagnostics
- Compatible with DS90UB935-Q1, DS90UB953-Q1, DS90UB933-Q1 and DS90UB913A-Q1 serializers
- Line fault detection and advanced diagnostics
- ISO 10605 and IEC 61000-4-2 ESD compliant
DS90UB954-Q1에 대한 설명
The DS90UB954-Q1 is a versatile dual deserializer hub capable of receiving serialized sensor data from one or two independent source s through an FPD-Link III interface. When paired with a DS90UB953-Q1 serializer, the DS90UB954-Q1 receives data from imagers, supporting 2MP/60fps and 4MP/30fps cameras as well as satellite RADAR and other sensors such as ToF and LIDAR. Data is received and aggregated into a MIPI CSI-2 compliant output for interconnect to a downstream processor. For sensors with DS90UB933-Q1 and DS90UB913A-Q1 serializers, the DS90UB954-Q1 receives and aggregates data from one or two sensors including Full HD 1080p 2MP 60/fps imager sensors. When configuring the CSI-2 interface for 2-lane operation, a duplicate MIPI CSI-2 clock lane is available to provide a replicated output. Replication mode creates two copies of the aggregated video stream for data logging and parallel processing.
The DS90UB954-Q1 and partner DS90UB953-Q1 chipset is AEC-Q100 qualified and designed to receive data across either 50-Ω single-ended coaxial or 100-Ω differential STP cables. The deserializer hub is ideal for Power-over-Coax applications and the receive equalizer automatically adapts to compensate for cable loss characteristics with no additional programming required, including cable degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control channel (BCC) that continuously conveys I2C, GPIO, and other control information. GPIO signals purposed for sensor synchronization and diagnostic features also make use of the BCC.