제품 상세 정보

Technology family LS Function Encoder Configuration 8:3,10:4 Number of channels 1 Operating temperature range (°C) 0 to 70 Rating Catalog
Technology family LS Function Encoder Configuration 8:3,10:4 Number of channels 1 Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • '147, 'LS147
    • Encodes 10-Line Decimal to 4-Line BCD
    • Applications Include:
      • Keyboard Encoding
      • Range Selection
  • '148, 'LS148
    • Encodes 8 Data Lines to 3-Line Binary (Octal)
    • Applications Include:
      • N-Bit Encoding
      • Code Converters and Generators

NOTE: The SN54147, SN54LS147, SN54148, SN74147, SN74LS147, and SN74148 are obsolete and are no longer supplied.

  • '147, 'LS147
    • Encodes 10-Line Decimal to 4-Line BCD
    • Applications Include:
      • Keyboard Encoding
      • Range Selection
  • '148, 'LS148
    • Encodes 8 Data Lines to 3-Line Binary (Octal)
    • Applications Include:
      • N-Bit Encoding
      • Code Converters and Generators

NOTE: The SN54147, SN54LS147, SN54148, SN74147, SN74LS147, and SN74148 are obsolete and are no longer supplied.

These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The '147 and 'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition as zero is encoded when all nine data lines are at a high logic level. The '148 and 'LS148 encode eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input E1 and enable output E0) has been provided to allow octal expansion without the need for external circuitry. For all types, data inputs and outputs are active at the low logic level. All inputs are buffered to represent one normalized Series 54/74 or 54LS/74LS load, respectively.

These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The '147 and 'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition as zero is encoded when all nine data lines are at a high logic level. The '148 and 'LS148 encode eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input E1 and enable output E0) has been provided to allow octal expansion without the need for external circuitry. For all types, data inputs and outputs are active at the low logic level. All inputs are buffered to represent one normalized Series 54/74 or 54LS/74LS load, respectively.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
CD74ACT151 활성 8입력 멀티플렉서 Shorter average propagation delay (8ns), higher average drive strength (24mA)

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
11개 모두 보기
유형 직함 날짜
* Data sheet SN54147, SN54148, SN54LS147, SN54LS148,SN74147, SN74148 (TIM9907), SN74LS147, SN datasheet (Rev. B) 2004/05/26
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024/04/30
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Designing with the SN54/74LS123 (Rev. A) 1997/03/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
패키지 CAD 기호, 풋프린트 및 3D 모델
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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