홈 데이터 컨버터 아날로그-디지털 컨버터(ADC) 정밀 ADC
홈
데이터 컨버터
아날로그-디지털 컨버터(ADC)
정밀 ADC

TLV2548-EP

활성

EP(Enhanced Product) 2비트 200kSPS ADC 시리얼라이저 출력, 자동 전원 차단(S/W 및 H/W), 저전력(8) x FIFO(8채널)

지금 주문하기
데이터 시트

TLV2548-EP

활성
데이터 시트 지금 주문하기

제품 상세 정보

Resolution (Bits) 12 Sample rate (max) (ksps) 200 Number of input channels 8 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -55 to 125 Power consumption (typ) (mW) 3.3 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 71 Digital supply (min) (V) 3 Digital supply (max) (V) 5.5
Resolution (Bits) 12 Sample rate (max) (ksps) 200 Number of input channels 8 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -55 to 125 Power consumption (typ) (mW) 3.3 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 71 Digital supply (min) (V) 3 Digital supply (max) (V) 5.5
TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm)
  • Maximum Throughput 200-KSPS
  • Built-In Reference, Conversion Clock and 8x FIFO
  • Differential/Integral Nonlinearity Error: ±1.2 LSB
  • Signal-to-Noise and Distortion Ratio: 70 dB, fi = 12 kHz
  • Spurious Free Dynamic Range: 75 dB, fi = 12 kHz
  • SPI (CPOL = 0, CPHA = 0)/DSP-Compatible Serial Interfaces
    With SCLK up to 20 MHz
  • Single Wide Range Supply 3.0 Vdc to 5.5 Vdc
  • Analog Input Range 0 V to Supply Voltage With 500-kHz BW
  • Hardware Controlled and Programmable Sampling Period
  • Low Operating Current (1.0 mA at 3.3 V, 2.0 mA at 5.5 V With External Ref,
    1.7-mA at 3.3V, 2.4-mA at 5.5-V With Internal Ref)
  • Power Down: Software/Hardware
    Power-Down Mode (1 µA Max, Ext Ref),
    Autopower-Down Mode (1 µA, Ext Ref)
  • Programmable Auto-Channel Sweep
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Custom temperature ranges available
  • Maximum Throughput 200-KSPS
  • Built-In Reference, Conversion Clock and 8x FIFO
  • Differential/Integral Nonlinearity Error: ±1.2 LSB
  • Signal-to-Noise and Distortion Ratio: 70 dB, fi = 12 kHz
  • Spurious Free Dynamic Range: 75 dB, fi = 12 kHz
  • SPI (CPOL = 0, CPHA = 0)/DSP-Compatible Serial Interfaces
    With SCLK up to 20 MHz
  • Single Wide Range Supply 3.0 Vdc to 5.5 Vdc
  • Analog Input Range 0 V to Supply Voltage With 500-kHz BW
  • Hardware Controlled and Programmable Sampling Period
  • Low Operating Current (1.0 mA at 3.3 V, 2.0 mA at 5.5 V With External Ref,
    1.7-mA at 3.3V, 2.4-mA at 5.5-V With Internal Ref)
  • Power Down: Software/Hardware
    Power-Down Mode (1 µA Max, Ext Ref),
    Autopower-Down Mode (1 µA, Ext Ref)
  • Programmable Auto-Channel Sweep
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Custom temperature ranges available

The TLV2548 is a high performance, 12-bit low-power, 3.86-µs, CMOS analog-to-digital converter (ADC) which operates from a single 3.0-V to 5.5-V power supply. This device has three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TI DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, this device has an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLV2548 is designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/autopower-down modes and programmable conversion speeds. The conversion clock (OSC) and reference are built-in. The converter can use the external SCLK as the source of the conversion clock to achieve higher (up to 2.8 µs when a 20-MHz SCLK is used) conversion speed. Two different internal reference voltages are available. An optional external reference can also be used to achieve maximum flexibility.

The TLV2548 is characterized for operation from –55°C to 125°C.

The TLV2548 is a high performance, 12-bit low-power, 3.86-µs, CMOS analog-to-digital converter (ADC) which operates from a single 3.0-V to 5.5-V power supply. This device has three digital inputs and a 3-state output [chip select (CS), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TI DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, this device has an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLV2548 is designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/autopower-down modes and programmable conversion speeds. The conversion clock (OSC) and reference are built-in. The converter can use the external SCLK as the source of the conversion clock to achieve higher (up to 2.8 µs when a 20-MHz SCLK is used) conversion speed. Two different internal reference voltages are available. An optional external reference can also be used to achieve maximum flexibility.

The TLV2548 is characterized for operation from –55°C to 125°C.
filter 기타 정밀 ADC 찾기
다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
ADS7067 활성 GPIO 및 SPI를 지원하는 8채널, 800kSPS, 16비트 SAR 아날로그-디지털 컨버터(ADC) Higher resolution, higher speed, commercial grade
ADS7038 활성 SPI, GPIO 및 CRC를 지원하는 8채널, 1MSPS, 12비트 아날로그-디지털 컨버터(ADC) Higher speed, commercial grade
ADS1278-EP 활성 개선된 제품 8진, 144kHz, 동시 샘플링 24비트 델타 시그마 ADC Higher resolution, lower speed, different architecture

기술 자료

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5개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converter datasheet 2009. 10. 28
* VID TLV2548-EP VID V6210603 2016. 6. 21
e북 Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015. 5. 21
애플리케이션 노트 Determining Minimum Acquisition Times for SAR ADCs, part 2 2011. 3. 17
애플리케이션 노트 Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010. 11. 10

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

설계 툴

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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지원 및 교육

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