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DAC53508 활성 SPI를 지원하는 10진, 8비트, 버퍼 전압 출력 DAC 10-bit, lower power, smaller 3mm × 3mm QFN package

제품 상세 정보

Resolution (Bits) 10 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 2 Settling time (µs) 1 Reference type Ext, Int Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
Resolution (Bits) 10 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 2 Settling time (µs) 1 Reference type Ext, Int Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm)
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.

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기술 자료

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상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V, Low Power DAC with Power Down datasheet (Rev. F) 2008. 11. 14

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

설계 툴

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian

주문 및 품질

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지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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