패키징 정보
| 패키지 | 핀 CFP (HKR) | 16 |
| 작동 온도 범위(°C) -55 to 125 |
| 패키지 수량 | 캐리어 25 | TUBE |
TPS7H1101-SP의 주요 특징
- 5962R13202:
- Radiation Hardness Assurance (RHA) up to TID 100 krad (Si)
- Total Ionizing Dose 100 krad (Si)
- ELDRS-Free 100 krad (Si)
- Dose Rate 10 mRAD (si)/s
- Single Event Latchup (SEL) Immune to LET = 85 MeV-cm2/mg
- SEB and SEGR Immune to LET = 85 MeV-cm2/mg
- SET/SEFI Onset Threshold > 40 MeV-cm2/mg, See Radiation Report for Details
- Specifically Designed to Always Upset Low to Avoid Damage to Critical Downstream Component
- SET/SEFI Cross-Section Plot, See Radiation Report for Details
- Ultra-Low VIN Range: 1.5 V to 7 V
- 3-A Maximum Output Current
- Current Share/Parallel Operation to Provide up to 6-A Output Current
- Stable With Ceramic Output Capacitor
- ±2% Accuracy Over Line, Load, and Temperature
- Programmable Soft-Start Through External Capacitor
- Input Enable and Power-Good Output for Power Sequencing
- Ultra-Low Dropout LDO Voltage: 62 mV at 1 A (25°C), VOUT = 1.8 V
- Low Noise: 20.33 µVRMS VIN = 2 V, VOUT = 1.8 V at 3 A
- PSRR: Over 45 dB at 1 kHz
- Excellent Load/Line Transient Response
- Foldback Current Limit
- See the Tools & Software Tab
- Thermally-Enhanced CFP Package (0.6°C/W RθJC)
TPS7H1101-SP에 대한 설명
The TPS7H1101-SP is a radiation-hardened LDO linear regulator that uses a PMOS pass element configuration. This device operates over a wide range of input voltage, from 1.5 V to 7 V while offering excellent PSRR. The TPS7H1101-SP features a precise and programmable foldback current limit implementation with a very-wide adjustment range. To support the complex power requirements of FPGAs, DSPs, or microcontrollers, the TPS7H1101-SP provides enable on and off functionality, programmable SoftStart, current sharing capability, and a PowerGood open-drain output.
The TPS7H1101-SP is available in a thermally-enhanced 16-pin ceramic flatpack package (CFP).