VSP1221

활성

CCD 센서용 12비트, 21MSPS 1채널 AFE

제품 상세 정보

Resolution (Bits) 12 Sample rate (Msps) 21 Gain (min) (dB) 0 Gain (max) (dB) 36 Pd (typ) (mW) 90 Operating temperature range (°C) 0 to 70 Output data format CMOS Parallel Rating Catalog
Resolution (Bits) 12 Sample rate (Msps) 21 Gain (min) (dB) 0 Gain (max) (dB) 36 Pd (typ) (mW) 90 Operating temperature range (°C) 0 to 70 Output data format CMOS Parallel Rating Catalog
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • 12-Bit, 21-MSPS, Analog-to-Digital Converter
  • Low Power: 70 mW Minimum Power-Down Mode: 4 mW
  • Low Input-Referred Noise: 75-dB SNR Typical at 0-dB Gain
  • Novel Optical-Black (OB) Calibration
  • Low-Aperture Delay
  • Single 3-V Supply Operation
  • DNL: <±0.5 LSB and <±1.5 LSB Typical at 0-dB Gain
  • Programmable-Gain Range: 0 dB to 36 dB, Gain Resolution of 0.05 dB/Step
  • 48-Pin TQFP Package
  • applications
    • Digital Still Camera
    • Digital Video Camera

  • 12-Bit, 21-MSPS, Analog-to-Digital Converter
  • Low Power: 70 mW Minimum Power-Down Mode: 4 mW
  • Low Input-Referred Noise: 75-dB SNR Typical at 0-dB Gain
  • Novel Optical-Black (OB) Calibration
  • Low-Aperture Delay
  • Single 3-V Supply Operation
  • DNL: <±0.5 LSB and <±1.5 LSB Typical at 0-dB Gain
  • Programmable-Gain Range: 0 dB to 36 dB, Gain Resolution of 0.05 dB/Step
  • 48-Pin TQFP Package
  • applications
    • Digital Still Camera
    • Digital Video Camera

The VSP1221 is a highly-integrated mixed-signal IC used for signal conditioning and analog-to-digital conversion at the output of a CCD array. The IC has a correlated double sampler (CDS) and an analog programmable-gain amplifier (PGA) stage followed by an analog-to-digital converter (ADC) and a digital PGA stage. The CDS is used to sample the CCD signal and is followed by the analog PGA stage. The ADC is a 12-bit, 21-MSPS pipelined ADC. The digital PGA provides further amplification.

Additionally, there is an offset calibration loop for optical-black correction. The optical-black reference level is user-programmable. The chip also has two eight-bit digital-to-analog converters (DAC) for external analog settings.

The chip has a serial port for configuring internal control registers.

The VSP1221 is available in a 48-pin TQFP package and operates from a single 3-V power supply.

The VSP1221 is a highly-integrated mixed-signal IC used for signal conditioning and analog-to-digital conversion at the output of a CCD array. The IC has a correlated double sampler (CDS) and an analog programmable-gain amplifier (PGA) stage followed by an analog-to-digital converter (ADC) and a digital PGA stage. The CDS is used to sample the CCD signal and is followed by the analog PGA stage. The ADC is a 12-bit, 21-MSPS pipelined ADC. The digital PGA provides further amplification.

Additionally, there is an offset calibration loop for optical-black correction. The optical-black reference level is user-programmable. The chip also has two eight-bit digital-to-analog converters (DAC) for external analog settings.

The chip has a serial port for configuring internal control registers.

The VSP1221 is available in a 48-pin TQFP package and operates from a single 3-V power supply.

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* 데이터 시트 12-Bit, 21-MSPS, UltraLow-Power CCD Signal Processor datasheet (Rev. B) 2014. 4. 16

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