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The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100% pre-emphasis overcomes external ISI jitter effects of lossy backplanes and cables. The differential inputs interface to LVDS and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The SCAN90CP02 can also be used with ASICs and FPGAs. The non-blocking crosspoint architecture is pin-configurable as a 1:2 clock or data splitter, 2:1 redundancy mux, crossover function, or dual buffer for signal booster and stub hider applications.
Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and differential LVDS PCB interconnect. The 3.3V supply, CMOS process, and LVDS I/O ensure high performance at low power over the entire industrial -40 to +85°C temperature range.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch w/Pre-Emphasis & IEEE 1149.6 datasheet (Rev. M) | Apr 12, 2013 | |
| Application note | AN-1313 SCAN90CP02 Design for Test Features (Rev. C) | Apr 26, 2013 | ||
| User guide | SCAN90CP02 2x2 LVDS Cross-point Switch Evaluation Kit | Feb 21, 2012 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| UQFN (NJD) | 28 | Ultra Librarian |
| LQFP (NEY) | 32 | Ultra Librarian |
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