產品詳細資料

Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type CMOS Analog input BW (MHz) 900 Features High Dynamic Range, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 164 Architecture SAR SNR (dB) 74 ENOB (Bits) 12.8 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type CMOS Analog input BW (MHz) 900 Features High Dynamic Range, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 164 Architecture SAR SNR (dB) 74 ENOB (Bits) 12.8 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² (5 mm × 5 mm)
  • Dual channel
  • 14-bit 125 MSPS ADC
  • Noise floor: –153 dBFS/Hz
  • Ultra-low power with optimized power scaling: 82 mW/ch (125 MSPS)
  • Latency: 1 clock cycle
  • 14-Bit, no missing codes
  • INL: ±1.5 LSB; DNL: ±0.5 LSB
  • Reference: external or internal
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral performance (fIN = 5 MHz):
    • SNR: 74.0 dBFS
    • SFDR: 90-dBc HD2, HD3
    • SFDR: 100-dBFS worst spur
  • Spectral performance (fIN = 70 MHz):
    • SNR: 72.5 dBFS
    • SFDR: 70-dBc HD2, HD3
    • SFDR: 85-dBFS worst spur
  • Dual channel
  • 14-bit 125 MSPS ADC
  • Noise floor: –153 dBFS/Hz
  • Ultra-low power with optimized power scaling: 82 mW/ch (125 MSPS)
  • Latency: 1 clock cycle
  • 14-Bit, no missing codes
  • INL: ±1.5 LSB; DNL: ±0.5 LSB
  • Reference: external or internal
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral performance (fIN = 5 MHz):
    • SNR: 74.0 dBFS
    • SFDR: 90-dBc HD2, HD3
    • SFDR: 100-dBFS worst spur
  • Spectral performance (fIN = 70 MHz):
    • SNR: 72.5 dBFS
    • SFDR: 70-dBc HD2, HD3
    • SFDR: 85-dBFS worst spur

The ADC3644 device is a low-noise, ultra-low power, 14-bit, 125-MSPS dual-channel, high-speed analog-to-digital converter (ADC). Designed for low power consumption, the device delivers a noise spectral density of –153 dBFS/Hz, combined with very good linearity and dynamic range. The ADC3644 offers IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 82 mW/ch at 125 MSPS, and power consumption scales well with lower sampling rates.

The ADC3644 use a DDR or a serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to 105⁰C.

The ADC3644 device is a low-noise, ultra-low power, 14-bit, 125-MSPS dual-channel, high-speed analog-to-digital converter (ADC). Designed for low power consumption, the device delivers a noise spectral density of –153 dBFS/Hz, combined with very good linearity and dynamic range. The ADC3644 offers IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 82 mW/ch at 125 MSPS, and power consumption scales well with lower sampling rates.

The ADC3644 use a DDR or a serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to 105⁰C.

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我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADC3644 14-bit, 125-MSPS, Low-noise, Low Power Dual Channel ADC datasheet PDF | HTML 2020/3/16
應用說明 High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs 2020/12/9
應用說明 High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization PDF | HTML 2020/12/8
類比設計期刊 How to simplify AFE filtering via high‐speed ADCs with internal digital filters 2020/1/10

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開發板

ADC3644EVM — 適用於雙通道、14 位元、125MSPS、低雜訊、超低功耗 ADC 的 ADC3644 評估模組

ADC3644 評估模組 (EVM) 專為評估 ADC3644 系列高速類比轉數位轉換器 (ADC) 所設計。本 EVM 搭載 ADC3644 晶片,該晶片為具備 CMOS 介面的 14 位元、雙通道 125MSPS ADC,可評估 14 位元裝置系列中的單通道或雙通道裝置。
使用指南: PDF | HTML
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DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31

這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。

使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)

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