產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 128 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 128 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RSH) 56 49 mm² (7 mm × 7 mm)
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
    • Linear phase response
    • ±0.0004dB pass-band ripple
    • 106dB stop-band attenuation
  • Low-latency filter mode: up to 1365kSPS
    • 3.9µs conversion latency
  • Power-scalable speed modes:
    • Max speed: 21mW/ch (512kSPS/1365kSPS)
    • High speed: 16mW/ch (400kSPS/1067kSPS)
    • Mid speed: 9mW/ch (200kSPS/533kSPS)
    • Low speed: 3mW/ch (50kSPS/133kSPS)
  • High precision:
    • SNR at 200kSPS: 97.7dB (typical)
    • THD: –115dB (typical)
    • INL: 0.5LSB (typical)
    • Offset drift: 60nV/°C (typical)
    • Gain drift: 1ppm/°C of FSR (typical)
  • Precharge buffered signal inputs
  • Bipolar or unipolar power supply operation
  • ±VREF or ±2VREF input ranges
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
    • Linear phase response
    • ±0.0004dB pass-band ripple
    • 106dB stop-band attenuation
  • Low-latency filter mode: up to 1365kSPS
    • 3.9µs conversion latency
  • Power-scalable speed modes:
    • Max speed: 21mW/ch (512kSPS/1365kSPS)
    • High speed: 16mW/ch (400kSPS/1067kSPS)
    • Mid speed: 9mW/ch (200kSPS/533kSPS)
    • Low speed: 3mW/ch (50kSPS/133kSPS)
  • High precision:
    • SNR at 200kSPS: 97.7dB (typical)
    • THD: –115dB (typical)
    • INL: 0.5LSB (typical)
    • Offset drift: 60nV/°C (typical)
    • Gain drift: 1ppm/°C of FSR (typical)
  • Precharge buffered signal inputs
  • Bipolar or unipolar power supply operation
  • ±VREF or ±2VREF input ranges
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V

The ADS117L14 (quad) and ADS117L18 (octal) are 16-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs). The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode). The 24-bit ADS127L14 (quad) and ADS127L18 (octal) ADCs are pin-compatible devices for increased resolution.

The ADS117L14 (quad) and ADS117L18 (octal) are 16-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs). The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode). The 24-bit ADS127L14 (quad) and ADS127L18 (octal) ADCs are pin-compatible devices for increased resolution.

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* 資料表 ADS117L1x 512kSPS, Quad and Octal, Simultaneous-Sampling, 16-Bit ΔΣ ADCs datasheet PDF | HTML 2025/5/23

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開發板

ADS127L18EVM-PDK — ADS127L18 評估模組

ADS127L18EVM 為評估 ADS127L18 性能的平台,而 ADS127L18 是八通道、24 位元同步取樣 ΔΣ 類比數位轉換器 (ADC)。評估套件包含 ADS127L18EVM 板和精密主機介面 (PHI) 控制器板,可讓隨附的電腦軟體透過 USB 與 ADC 通訊,以進行資料擷取、配置與分析。
使用指南: PDF | HTML
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ADS127L18-FPGA-EXAMPLE-CODE — ADS127L18 example FPGA code

Expedite your digital design using this example Verilog/RTL code for the ADS127L18 product family
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支援軟體

ADS127L18-MSPM0-EXAMPLE-CODE — ADS127L18 + MSPM0 example code

Expedite your design using this example C code for interfacing MSPM0 and the ADS127L18 product family.
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模擬型號

ADS117L14, ADS117L18, ADS127L14, ADS127L18 IBIS Model

SBAM524.ZIP (88 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RSH) 56 Ultra Librarian

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