產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
WQFN (RUK) 20 9 mm² (3 mm × 3 mm)
  • AC performance with dc precision:
    • Dynamic range (200kSPS): 111.5dB (typical)
    • INL: 0.2ppm of FSR (typical)
    • THD: –125dB (typical)
    • Offset drift: 50nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Power-scalable speed modes:
    • Max speed: 512kSPS (33mW typical)
    • High speed: 400kSPS (26mW typical)
    • Mid speed: 200kSPS (14mW typical)
    • Low speed: 50kSPS (4.3mW typical)
  • Wideband or low-latency filter modes
  • Programmable data rates:
    • Wideband filter mode: 512kSPS
    • Low-latency filter mode: 1.365MSPS
  • Programmable IIR and FIR digital filters
  • Buffered inputs
    • 1.5µA input current typical, mid-speed mode
  • Input range: ±VREF or ±2VREF
  • Internal or external clock operation
  • Conversion latency (low-latency filter): 3µs
  • Functional Safety-Capable
  • AC performance with dc precision:
    • Dynamic range (200kSPS): 111.5dB (typical)
    • INL: 0.2ppm of FSR (typical)
    • THD: –125dB (typical)
    • Offset drift: 50nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Power-scalable speed modes:
    • Max speed: 512kSPS (33mW typical)
    • High speed: 400kSPS (26mW typical)
    • Mid speed: 200kSPS (14mW typical)
    • Low speed: 50kSPS (4.3mW typical)
  • Wideband or low-latency filter modes
  • Programmable data rates:
    • Wideband filter mode: 512kSPS
    • Low-latency filter mode: 1.365MSPS
  • Programmable IIR and FIR digital filters
  • Buffered inputs
    • 1.5µA input current typical, mid-speed mode
  • Input range: ±VREF or ±2VREF
  • Internal or external clock operation
  • Conversion latency (low-latency filter): 3µs
  • Functional Safety-Capable

The ADS127L21B is a high-precision, 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) featuring programmable digital filters. This digital filter has data rates up to 512kSPS using the wideband filter and up to 1365kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The low-drift modulator achieves excellent dc precision with maximum 0.8ppm INL (0°C to 70°C) and outstanding ac performance with low wideband noise. The power-scalable architecture features four speed modes to optimize data rate, resolution, and power consumption. Signal and reference input buffers reduce driver loading for increased accuracy.

Programmable infinite and finite impulse response (IIR and FIR) digital filters allow custom filter profiles, such as A-weighting compensation and frequency notch filters. The wideband or low-latency filter option optimize ac-signal performance or data throughput of dc signals, all in one device.

The serial interface features daisy-chain capability to reduce the number of signal lines over an isolation barrier. SPI input data and register memory contents are validated by cyclic-redundancy check (CRC) to enhance operational reliability.

The small 3mm × 3mm WQFN package is designed for space-limited applications. The device is fully specified for operation over the –40°C to +125°C temperature range and is pin-to-pin compatible to the ADS127L21.

The ADS127L21B is a high-precision, 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) featuring programmable digital filters. This digital filter has data rates up to 512kSPS using the wideband filter and up to 1365kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The low-drift modulator achieves excellent dc precision with maximum 0.8ppm INL (0°C to 70°C) and outstanding ac performance with low wideband noise. The power-scalable architecture features four speed modes to optimize data rate, resolution, and power consumption. Signal and reference input buffers reduce driver loading for increased accuracy.

Programmable infinite and finite impulse response (IIR and FIR) digital filters allow custom filter profiles, such as A-weighting compensation and frequency notch filters. The wideband or low-latency filter option optimize ac-signal performance or data throughput of dc signals, all in one device.

The serial interface features daisy-chain capability to reduce the number of signal lines over an isolation barrier. SPI input data and register memory contents are validated by cyclic-redundancy check (CRC) to enhance operational reliability.

The small 3mm × 3mm WQFN package is designed for space-limited applications. The device is fully specified for operation over the –40°C to +125°C temperature range and is pin-to-pin compatible to the ADS127L21.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS127L21B 512kSPS, High-Precision, 24-Bit, Wideband Delta-Sigma ADC datasheet PDF | HTML 2024/10/16
應用說明 Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML 2025/12/29

設計與開發

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開發板

ADS127L21EVM-PDK — ADS127L21 評估模組,適用於具有易於驅動的輸入和寬頻或低延遲濾波器的 ADC

ADS127L21EVM-PDK 是用於 ADS127L21 24 位元高速自訂高頻寬濾波器 Delta-Sigma (ΔΣ) 類比轉數位轉換器 (ADC) 性能的評估平台。評估套件包含 ADS127L21EVM 電路板、PHI 控制器電路板,以及隨附的電腦軟體,其可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。
使用指南: PDF | HTML
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模擬型號

ADS127L21B IBIS Model

SBAM523.ZIP (101 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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參考設計

TIDA-010970 — 低雜訊、高線性數位萬用表及資料擷取訊號鏈參考設計

此設計的目標應用包括需要超高精密度以測量 DC 訊號的數位萬用表 (DMM)。此設計採用 ADS127L21B,這是一款高性能 24 位元類比數位轉換器 (ADC),具有良好的線性度,進而實現了有效的 DC 準確度。REF81 是一款超低漂移埋入式稽納參考二極體,用於校準訊號鏈,以消除增益和偏移誤差。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RUK) 20 Ultra Librarian

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