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ADS1601

現行

16 位元、1.25MSPS、高速和高精密度 Delta Sigma ADC

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ADS1601

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 1250 Number of input channels 1 Interface type Serial Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 4.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 330 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 91 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
Resolution (Bits) 16 Sample rate (max) (ksps) 1250 Number of input channels 1 Interface type Serial Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 4.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 330 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 91 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • High Speed:
    • Data Rate: 1.25MSPS
    • Bandwidth: 615kHz
  • Outstanding Performance:
    • SNR: 92dB at fIN = 100kHz, –1dBFS
    • THD: –103dB at fIN = 100kHz, –6dBFS
    • SFDR: 105dB at fIN = 100kHz, –6dBFS
  • Ease-of-Use:
    • High-Speed 3-Wire Serial Interface
    • Directly Connects to TMS320 DSPs
    • On-Chip Digital Filter Simplifies Anti-Alias Requirements
    • Simple Pin-Driven Control—No On-Chip Registers to Program
    • Selectable On-Chip Voltage Reference
    • Simultaneous Sampling with Multiple ADS1601s
  • Low Power:
    • 330mW at 1.25MSPS
    • 145mW at 625kSPS
    • Power-Down Mode
  • High Speed:
    • Data Rate: 1.25MSPS
    • Bandwidth: 615kHz
  • Outstanding Performance:
    • SNR: 92dB at fIN = 100kHz, –1dBFS
    • THD: –103dB at fIN = 100kHz, –6dBFS
    • SFDR: 105dB at fIN = 100kHz, –6dBFS
  • Ease-of-Use:
    • High-Speed 3-Wire Serial Interface
    • Directly Connects to TMS320 DSPs
    • On-Chip Digital Filter Simplifies Anti-Alias Requirements
    • Simple Pin-Driven Control—No On-Chip Registers to Program
    • Selectable On-Chip Voltage Reference
    • Simultaneous Sampling with Multiple ADS1601s
  • Low Power:
    • 330mW at 1.25MSPS
    • 145mW at 625kSPS
    • Power-Down Mode

The ADS1601 is a high-speed, high-precision, delta-sigma analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1601 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –103dB, and the spurious-free dynamic range (SFDR) is 105dB

Optimized for power and performance, the ADS1601 dissipates only 330mW while providing a full-scale differential input range of ±0.94VREF. Having such a wide input range makes out-of-range signals uncommon. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally on the ADS1601 or supplied externally.

The ADS1601 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 19.3MHz, which greatly simplifies the anti-aliasing circuitry. The modulator samples the input signal up to 20MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.

Output data is provided over a simple 3-wire serial interface at rates up to 1.25MSPS, with a –3dB bandwidth of 615kHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1601s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1601 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.

The high performing, easy-to-use ADS1601 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1601 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.

The ADS1601 is a high-speed, high-precision, delta-sigma analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1601 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –103dB, and the spurious-free dynamic range (SFDR) is 105dB

Optimized for power and performance, the ADS1601 dissipates only 330mW while providing a full-scale differential input range of ±0.94VREF. Having such a wide input range makes out-of-range signals uncommon. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally on the ADS1601 or supplied externally.

The ADS1601 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 19.3MHz, which greatly simplifies the anti-aliasing circuitry. The modulator samples the input signal up to 20MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.

Output data is provided over a simple 3-wire serial interface at rates up to 1.25MSPS, with a –3dB bandwidth of 615kHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1601s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1601 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.

The high performing, easy-to-use ADS1601 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1601 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 16-Bit, 1.25MSPS Analog-to-Digital Converter datasheet (Rev. D) 2011/10/20
應用說明 Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023/3/29
應用說明 ADS16xx Reference Options (Rev. A) PDF | HTML 2022/3/9
電子書 Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020/6/19
白皮書 Voltage-reference impact on total harmonic distortion 2016/8/1
電子書 Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs 2015/3/19

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模擬型號

ADS1601 IBIS Model (Rev. A)

SBAC048 (9 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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TQFP (PFB) 48 Ultra Librarian
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