ADS1602
- High Speed:
- Data Rate: 2.5MSPS
- Bandwidth: 1.23MHz
- Outstanding Performance:
- SNR: 91dB at fIN = 100kHz, –1dBFS
- THD: –101dB at fIN = 100kHz, –6dBFS
- SFDR: 103dB at fIN = 100kHz, –6dBFS
- Ease-of-Use:
- High-Speed 3-Wire Serial Interface
- Directly Connects to TMS320 DSPs
- On-Chip Digital Filter Simplifies Antialias Requirements
- Simple Pin-Driven Control—No On-Chip Registers to Program
- Selectable On-Chip Voltage Reference
- Simultaneous Sampling with Multiple ADS1602s
- Low Power:
- 530mW at 2.5MSPS
- Power-Down Mode
The ADS1602 is a high-speed, high-precision, delta-sigma (ΔΣ) analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1602 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –101dB, and the spurious-free dynamic range (SFDR) is 103dB.
Optimized for power and performance, the ADS1602 dissipates only 530mW while providing a full-scale differential input range of ±3V. Having such a wide input range makes out-of-range signals unlikely. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally or supplied externally on the ADS1602.
The ADS1602 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 38.6MHz, which greatly simplifies the antialiasing circuitry. The modulator samples the input signal up to 40MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.
Output data is provided over a simple 3-wire serial interface at rates up to 2.5MSPS, with a –3dB bandwidth of 1.23MHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1602s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1602 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.
The high performing, easy-to-use ADS1602 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1602 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 16-Bit, 2.5MSPS Analog-to-Digital Converter datasheet (Rev. E) | 2011年 10月 20日 | |
Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023年 3月 29日 | |
Application note | ADS16xx Reference Options (Rev. A) | PDF | HTML | 2022年 3月 9日 | |
E-book | Fundamentals of Precision ADC Noise Analysis | 2020年 6月 19日 | ||
White paper | Voltage-reference impact on total harmonic distortion | 2016年 8月 1日 | ||
E-book | Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs | 2015年 3月 19日 |
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TQFP (PFB) | 48 | Ultra Librarian |
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