產品詳細資料

Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 95 Architecture Pipeline SNR (dB) 71.1 ENOB (Bits) 11.2 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 95 Architecture Pipeline SNR (dB) 71.1 ENOB (Bits) 11.2 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGZ) 48 49 mm² (7 mm × 7 mm)
  • Ultra-Low Power With 1.8-V Single Supply:
    • 103-mW Total Power at 65 MSPS
    • 153-mW Total Power at 125 MSPS
  • High Dynamic Performance:
    • SNR: 72.2 dBFS at 170 MHz
    • SFDR: 81 dBc at 170 MHz
  • Dynamic Power Scaling With Sample Rate
  • Idle Channel SNR 74.8 dBFS (ADS414x)
  • Output Interface:
    • Double Data Rate (DDR) LVDS With Programmable Swing and Strength:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2x Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR, SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down to 200 mVPP
  • Ultra-Low Power With 1.8-V Single Supply:
    • 103-mW Total Power at 65 MSPS
    • 153-mW Total Power at 125 MSPS
  • High Dynamic Performance:
    • SNR: 72.2 dBFS at 170 MHz
    • SFDR: 81 dBc at 170 MHz
  • Dynamic Power Scaling With Sample Rate
  • Idle Channel SNR 74.8 dBFS (ADS414x)
  • Output Interface:
    • Double Data Rate (DDR) LVDS With Programmable Swing and Strength:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2x Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR, SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down to 200 mVPP

The ADS412x and ADS414x devices are lower-sampling speed variants in the ADS41xx family of analog-to-digital converters (ADCs). These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x and ADS414x devices have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x and ADS414x devices are available in a compact VQFN-48 package and are specified over the industrial temperature range (–40°C to +85°C).

The ADS412x and ADS414x devices are lower-sampling speed variants in the ADS41xx family of analog-to-digital converters (ADCs). These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The devices are well-suited for multi-carrier, wide bandwidth communications applications.

The ADS412x and ADS414x devices have fine gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. They include a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

The ADS412x and ADS414x devices are available in a compact VQFN-48 package and are specified over the industrial temperature range (–40°C to +85°C).

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模擬型號

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計算工具

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