ADS807
- SPURIOUS-FREE DYNAMIC RANGE:
82dB at 10MHz fIN - HIGH SNR: 67.5dB (2Vp-p), 69dB (3Vp-p)
- LOW POWER: 335mW
- INTERNAL OR EXTERNAL REFERENCE
- LOW DNL: 0.5LSB
- FLEXIBLE INPUT RANGE: 2Vp-p to 3Vp-p
- SSOP-28 PACKAGE
- APPLICATIONS
- COMMUNICATIONS IF PROCESSING
- COMMUNICATIONS BASESTATIONS
- TEST EQUIPMENT
- MEDICAL IMAGING
- VIDEO DIGITIZING
- CCD DIGITIZING
The ADS807 is a high-speed, high dynamic range, 12-bit pipelined Analog-to-Digital (A/D) converter. This converter includes a high-bandwidth track-and-hold that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of this track-and-hold and A/D converter circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity. The track-and-hold can also be operated single-ended.
The ADS807 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled allowing low drive, internal references to be used for improved tracking in multichannel systems.
The ADS807 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front end gain control circuitry. There is also an output enable pin to allow for multiplexing and testability on a PC board.
The ADS807 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS807: 12-Bit, 53MHz Sampling Analog-To-Digital Converter datasheet (Rev. A) | 2002/6/11 | |||
| 應用說明 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/9/10 | ||||
| 應用說明 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/4/28 | ||||
| 應用說明 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008/9/4 | ||||
| 應用說明 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/6/8 | ||||
| 應用說明 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/6/2 | ||||
| 使用指南 | DEM-ADS807E: Demonstration Fixture | 2000/9/27 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |