ADS8364
- 6 INPUT CHANNELS
- FULLY DIFFERENTIAL INPUTS
- 6 INDEPENDENT 16-BIT ADC
- 4 µs TOTAL THROUGHPUT PER CHANNEL
- TESTED NO MISSING CODES TO 14 BITS
- BUFFERED REFERENCE INPUTS
- LOW POWER: 450mW
- TQFP-64 PACKAGE
- APPLICATIONS
- MOTOR CONTROL
- MULTI-AXIS POSITIONING SYSTEMS
- 3-PHASE POWER CONTROL
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The ADS8364 includes six, 16-bit, 250KHz ADCs (Analog to Digital Converters) with 6 fully differential input channels grouped into two pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This provides excellent common-mode rejection of 80dB at 50KHz that is important in high-noise environments.
The ADS8364 offers a flexible high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 250kSPS, 16-Bit, 6-Channel Simultaneous Sampling A/D Converters datasheet (Rev. C) | 2006/8/22 | |||
| Application brief | Precision ADCs in Servo Drives (Rev. A) | PDF | HTML | 2025/10/29 | |||
| 白皮書 | Voltage-reference impact on total harmonic distortion | 2016/8/1 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/3/17 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010/11/10 | ||||
| 更多文件說明 | ADS8364EVM Readme Page Thank You Letter (Rev. A) | 2006/12/5 | ||||
| 應用說明 | Data Converters for Industrial Power Measurements (Rev. B) | 2005/12/9 | ||||
| 應用說明 | Interfacing the ADS8364 to the TMS320F2812 DSP | 2002/12/11 | ||||
| 應用說明 | Software Control of the ADS8364 | 2002/8/22 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TQFP (PAG) | 64 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。