The AFE7700 device is a high-performance, multichannel transceiver, integrating four direct up-conversion transmitter chains, four direct down-conversion receiver chains, and two wideband RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains enables high performance wireless transceiver systems.
The low power dissipation and large channel integration of the AFE7700 allows the device to address the power and size constraints of multi-antenna and phased array systems. The wideband and high dynamic range feedback path can assist the Digital Pre-Distortion (DPD) of power amplifiers and IQ correction in the transmitter chain. The fast SerDes speed can reduce the number of lanes required to transfer the data in and out.
Each receiver chain of the AFE7700 includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.
Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.
Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast switching between two observed RF input bands.
The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers and one feedback paths.
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| 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | AFE7700 Quad-Channel General Purpose RF Transceiver datasheet (Rev. A) | PDF | HTML | 2020年 2月 20日 |
| Certificate | AFE7700EVM EU Declaration of Conformity (DoC) | 2020年 8月 27日 |
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AFE7700 評估模組 (EVM) 是用於評估 AFE7700 整合式 RF 收發器的電路板。AFE7700 裝置支援高達 4 傳輸、4 接收和 2 個回饋通道 (4T4R2F)，並整合鎖相迴路 (PLL)、用於產生資料轉換器時脈的電壓控制振盪器 (VCO) 及本機振盪器 (LO)，具有可從 600MHz 調整至 6GHz 的 LO 頻率。
此標準 EVM 整合 RF 平衡不平衡轉換器，專門支援 600MHz 至 2700MHz。AFE7700 攢產品整合八個 JESD204B/C 相容的串聯器/解串器 (SerDes) 收發器 (最高可達 29.5 Gbps)，以透過板載 FPGA (...)
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (ABJ) | 400 | Ultra Librarian |
| FCBGA (ALK) | 400 | Ultra Librarian |
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。