產品詳細資料

Resolution (Bits) 16 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 1000 Features Ultra High Speed Rating Catalog Interpolation 1x Power consumption (typ) (mW) 650 SFDR (dB) 81 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (Bits) 16 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 1000 Features Ultra High Speed Rating Catalog Interpolation 1x Power consumption (typ) (mW) 650 SFDR (dB) 81 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
VQFN (RGC) 64 81 mm² (9 mm × 9 mm)
  • 16-Bit Digital-to-Analog Converter (DAC)
  • 1.0 GSPS Update Rate
  • 16-Bit Wideband Input LVDS Data Bus
    • 8 Sample Input FIFO
    • On-Chip Delay Lock Loop
  • High Performance
    • 73 dBc ACLR WCDMA TM1 at 180 MHz
  • On Chip 1.2 V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-Pin 9 × 9 mm QFN
  • 16-Bit Digital-to-Analog Converter (DAC)
  • 1.0 GSPS Update Rate
  • 16-Bit Wideband Input LVDS Data Bus
    • 8 Sample Input FIFO
    • On-Chip Delay Lock Loop
  • High Performance
    • 73 dBc ACLR WCDMA TM1 at 180 MHz
  • On Chip 1.2 V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-Pin 9 × 9 mm QFN

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 16-bit 1.0 GSPS Digital-To-Analog Converter (DAC) . datasheet (Rev. C) 2012/8/6
類比設計期刊 Q3 2009 Issue Analog Applications Journal 2018/9/24
應用說明 High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012/10/23
使用指南 TSW1400 Pattern Generators 2012/5/3
類比設計期刊 Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs 2009/7/14
應用說明 Passive Terminations for Current Output DACs 2008/11/10
應用說明 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008/6/8
應用說明 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008/6/2

設計與開發

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開發板

DAC5681EVM — DAC5681 16 位元 1.0-GSPS 數位轉類比轉換器評估模組

The DAC5681EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' single-channel 16-bit 1.0 GSPS digital-to-analog converter (DAC) featuring a fll 1GSPS DDR LVDS interface. The EVM provides a flexible environment to test the DAC5681 under a variety of clock, (...)
使用指南: PDF
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開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31

這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。

使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)

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開發模組 (EVM) 的 GUI

SLAC497 — DAC5682z EVM Software

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開發模組 (EVM) 的 GUI

SLLC420 — TSW3100EVM GUI v2.7

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模擬型號

DAC5681, DAC5681Z, DAC5682Z IBIS Model (Rev. A)

SLLC320 (38 KB) - IBIS 模型
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計算工具

SLAC169 — DAC5682 LPF Calculator

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGC) 64 Ultra Librarian

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