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ISO6721 現行 通用型雙通道 1/1 數位隔離器 Pin-to-pin upgrade with higher isolation, stronger CMTI, wider supply range and better immunity

產品詳細資料

Rating Catalog Integrated isolated power No Isolation rating Basic Number of channels 2 Forward/reverse channels 1 forward / 1 reverse Default output High Data rate (max) (Mbps) 5 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 15000 Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 5 Supply voltage (min) (V) 3.3 Propagation delay time (typ) (µs) 0.055 Current consumption per channel (DC) (typ) (mA) 4.3 Current consumption per channel (1 Mbps) (typ) (mA) 5 Creepage (min) (mm) 4 Clearance (min) (mm) 4
Rating Catalog Integrated isolated power No Isolation rating Basic Number of channels 2 Forward/reverse channels 1 forward / 1 reverse Default output High Data rate (max) (Mbps) 5 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 15000 Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 5 Supply voltage (min) (V) 3.3 Propagation delay time (typ) (µs) 0.055 Current consumption per channel (DC) (typ) (mA) 4.3 Current consumption per channel (1 Mbps) (typ) (mA) 5 Creepage (min) (mm) 4 Clearance (min) (mm) 4
SOIC (D) 8 29.4 mm² 4.9 x 6
  • 1, 5, 25, and 150-Mbps Signaling Rate Options
    • Low Channel-to-Channel Output Skew; 1-ns Max
    • Low Pulse-Width Distortion (PWD); 1-ns Max
    • Low Jitter Content; 1 ns Typ at 150 Mbps
  • 50 kV/µs Typical Transient Immunity
  • Operates with 2.8-V (C-Grade), 3.3-V, or 5-V Supplies
  • 4-kV ESD Protection
  • High Electromagnetic Immunity
  • –40°C to +125°C Operating Range
  • Typical 28-Year Life at Rated Voltage (see High-Voltage Lifetime of the ISO72x Family of Digital Isolators and Isolation Capacitor Lifetime Projection)
  • Safety-Related Certifications
    • VDE Basic Insulation with 4000-VPK VIOTM, 560 VPK VIORM per DIN VDE V 0884-11:2017-01 and DIN EN 61010-1 (VDE 0411-1)
    • 2500 VRMS Isolation per UL 1577
    • CSA Approved for IEC 60950-1 and IEC 62368-1
  • 1, 5, 25, and 150-Mbps Signaling Rate Options
    • Low Channel-to-Channel Output Skew; 1-ns Max
    • Low Pulse-Width Distortion (PWD); 1-ns Max
    • Low Jitter Content; 1 ns Typ at 150 Mbps
  • 50 kV/µs Typical Transient Immunity
  • Operates with 2.8-V (C-Grade), 3.3-V, or 5-V Supplies
  • 4-kV ESD Protection
  • High Electromagnetic Immunity
  • –40°C to +125°C Operating Range
  • Typical 28-Year Life at Rated Voltage (see High-Voltage Lifetime of the ISO72x Family of Digital Isolators and Isolation Capacitor Lifetime Projection)
  • Safety-Related Certifications
    • VDE Basic Insulation with 4000-VPK VIOTM, 560 VPK VIORM per DIN VDE V 0884-11:2017-01 and DIN EN 61010-1 (VDE 0411-1)
    • 2500 VRMS Isolation per UL 1577
    • CSA Approved for IEC 60950-1 and IEC 62368-1

The ISO7220x and ISO7221x family devices are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220x and in opposite directions in the ISO7221x. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 VPK per VDE. Used in conjunction with isolated power supplies, these devices block high voltage and isolate grounds, as well as prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (DC) to 150 Mbps (The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps). The A-option, B-option, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise filter and the additional propagation delay.

The ISO7220x and ISO7221x family of devices require two supply voltages of 2.8 V (C-Grade), 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 2.8-V or 3.3-V supply and all outputs are 4-mA CMOS.

The ISO7220x and ISO7221x family of devices are characterized for operation over the ambient temperature range of –40°C to +125°C.

The ISO7220x and ISO7221x family devices are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220x and in opposite directions in the ISO7221x. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 VPK per VDE. Used in conjunction with isolated power supplies, these devices block high voltage and isolate grounds, as well as prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (DC) to 150 Mbps (The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps). The A-option, B-option, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise filter and the additional propagation delay.

The ISO7220x and ISO7221x family of devices require two supply voltages of 2.8 V (C-Grade), 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 2.8-V or 3.3-V supply and all outputs are 4-mA CMOS.

The ISO7220x and ISO7221x family of devices are characterized for operation over the ambient temperature range of –40°C to +125°C.

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技術文件

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類型 標題 日期
* Data sheet ISO722x Dual-Channel Digital Isolators datasheet (Rev. Q) PDF | HTML 2020年 4月 29日
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 2024年 1月 31日
Application note Digital Isolator Design Guide (Rev. G) PDF | HTML 2023年 9月 13日
White paper Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) PDF | HTML 2023年 9月 7日
Certificate CSA Certificate for ISO722xD 2023年 3月 15日
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 1 (Rev. A) 2022年 8月 5日
White paper Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
White paper Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
EVM User's guide Universal Digital Isolator Evaluation Module PDF | HTML 2021年 3月 4日
Application brief Considerations for Selecting Digital Isolators 2018年 7月 24日
EVM User's guide Dual-Channel Digital Isolator EVM (Rev. D) 2013年 7月 8日
EVM User's guide Dual-Channel Digital Isolator EVM (Rev. A) 2009年 7月 14日
EVM User's guide Dual-Channel Digital Isolator EVM 2007年 6月 30日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DIGI-ISO-EVM — 通用數位隔離器評估模組

DIGI-ISO-EVM 是一款評估模組 (EVM),可評估任何 TI 單通道、雙通道、三通道、四通道或六通道數位隔離器裝置,並提供五種不同封裝 - 8 接腳窄體 SOIC (D)、8 接腳寬體 SOIC (DWV)、16 接腳寬體 SOIC (DWW)、16 接腳超寬體 SOIC (DWW) 和 16 接腳 (DBQ) 封裝。EVM 具備足夠 Berg 接腳選項,可用於評估具最少外部零組件的裝置。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

ISO7221 IBIS Model

SLLM208.ZIP (13 KB) - IBIS Model
參考設計

TIDA-01411 — 2 型 PoE PSE、6kV 雷擊突波參考設計

This reference design provides lightning surge protection solution for Power over Ethernet (PoE) Power Sourcing Equipment (PSE) systems based on TI's TPS23861 PSE controller. The need for implementing such protection will normally depend on the environment in which the PSE is intended to operate (...)
Design guide: PDF
電路圖: PDF
封裝 引腳 下載
SOIC (D) 8 檢視選項

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  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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