LM2742
- Input Power from 1V to 16V
- Output Voltage Adjustable down to 0.6V
- Power Good Flag, Adjustable Soft-start and Output Enable for Easy Power Sequencing
- Reference Accuracy: 1.5% (0°C–125°C)
- Current Limit Without Sense Resistor
- Soft Start
- Switching Frequency from 50 kHz to 2 MHz
- 40ns Typical Minimum On-time
- TSSOP-14 Package
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The LM2742 is a high-speed, synchronous, switching regulator controller. It is intended to control currents of 0.7A to 20A with up to 95% conversion efficiencies. Power up and down sequencing is achieved with the power-good flag, adjustable soft-start and output enable features. The LM2742 operates from a low-current 5V bias and can convert from a 1V to 16V power rail. The part utilizes a fixed-frequency, voltage-mode, PWM control architecture and the switching frequency is adjustable from 50kHz to 2MHz by setting the value of an external resistor. Current limit is achieved by monitoring the voltage drop across the on-resistance of the low-side MOSFET, which enables on-times on the order of 40ns, one of the best in the industry. The wide range of operating frequencies gives the power supply designer the flexibility to fine-tune component size, cost, noise and efficiency. The adaptive, non-overlapping MOSFET gate-drivers and high-side bootstrap structure helps to further maximize efficiency. The high-side power FET drain voltage can be from 1V to 16V and the output voltage is adjustable down to 0.6V.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LM2742 N-Chan FET Synch Buck Reg Cntrlr for Low Output Voltages datasheet (Rev. C) | 2013/3/28 | |||
| 選擇指南 | Power Management Guide 2018 (Rev. R) | 2018/6/25 | ||||
| 類比設計期刊 | Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics | 2016/7/21 | ||||
| 應用說明 | Automated Frequency Response Analyzer | 2013/10/9 | ||||
| 應用說明 | AN-1603 LM274X Reference Designs (Rev. C) | 2013/5/1 | ||||
| 應用說明 | Current Limit Foldback Improves Short Circuit Protection in LM274X Family (Rev. B) | 2013/4/23 | ||||
| 應用說明 | Optmiz Pwr Cntrlr Dsigns thru Utiliz Freq & Sync, Ext Ref, Trking & Precis EN | 2008/4/24 | ||||
| 應用說明 | Power Management Considerations for FPGAs and ASICs | 2007/3/22 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 14 | Ultra Librarian |