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TLV9102 現行 雙路、16V、1.1MHz、低功耗運算放大器 Pin-to-pin upgrade with improved performance: lower Vos(1.5mV), higher slew rate(4.5V/us) and output current(80mA)

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1.4 Slew rate (typ) (V/µs) 1.5 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 0.4 Vn at 1 kHz (typ) (nV√Hz) 27 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 2.3 Features Small Size Input bias current (max) (pA) 0.2 CMRR (typ) (dB) 96 Iout (typ) (A) 0.005 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.5 Input common mode headroom (to positive supply) (typ) (V) -0.5 Output swing headroom (to negative supply) (typ) (V) 0.07 Output swing headroom (to positive supply) (typ) (V) -0.08
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2 Rail-to-rail In to V-, Out GBW (typ) (MHz) 1.4 Slew rate (typ) (V/µs) 1.5 Vos (offset voltage at 25°C) (max) (mV) 5 Iq per channel (typ) (mA) 0.4 Vn at 1 kHz (typ) (nV√Hz) 27 Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 2.3 Features Small Size Input bias current (max) (pA) 0.2 CMRR (typ) (dB) 96 Iout (typ) (A) 0.005 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.5 Input common mode headroom (to positive supply) (typ) (V) -0.5 Output swing headroom (to negative supply) (typ) (V) 0.07 Output swing headroom (to positive supply) (typ) (V) -0.08
DSBGA (YZR) 8 3.0625 mm² 1.75 x 1.75 SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • (Typical Unless Otherwise Noted)
  • LMC6035 in DSBGA Package
  • Ensured 2.7V, 3V, 5V and 15V Performance
  • Specified for 2 kΩ and 600Ω Loads
  • Wide Operating Range:  2.0V to 15.5V
  • Ultra Low Input Current: 20fA
  • Rail-to-Rail Output Swing
    • @ 600&3937;: 200mV from Either Rail at 2.7V
    • @ 100kΩ: 5mV from Either Rail at 2.7V
  • High Voltage Gain: 126dB
  • Wide Input Common-Mode Voltage Range
    •  -0.1V to 2.3V at VS = 2.7V
  • Low Distortion: 0.01% at 10kHz
  • LMC6035 Dual LMC6036 Quad
  • See AN-1112 (Literature Number SNVA009)
    for DSBGA Considerations
  • AEC-Q100 Grade 3 Qualified (LMC6035-Q1)
  • (Typical Unless Otherwise Noted)
  • LMC6035 in DSBGA Package
  • Ensured 2.7V, 3V, 5V and 15V Performance
  • Specified for 2 kΩ and 600Ω Loads
  • Wide Operating Range:  2.0V to 15.5V
  • Ultra Low Input Current: 20fA
  • Rail-to-Rail Output Swing
    • @ 600&3937;: 200mV from Either Rail at 2.7V
    • @ 100kΩ: 5mV from Either Rail at 2.7V
  • High Voltage Gain: 126dB
  • Wide Input Common-Mode Voltage Range
    •  -0.1V to 2.3V at VS = 2.7V
  • Low Distortion: 0.01% at 10kHz
  • LMC6035 Dual LMC6036 Quad
  • See AN-1112 (Literature Number SNVA009)
    for DSBGA Considerations
  • AEC-Q100 Grade 3 Qualified (LMC6035-Q1)

The LMC6035/6 is an economical, low voltage op amp capable of rail-to-rail output swing into loads of 600Ω. LMC6035 is available in a chip sized package (8-Bump DSBGA) using micro SMD package technology. Both allow for single supply operation and are ensured for 2.7V, 3V, 5V and 15V supply voltage. The 2.7 supply voltage corresponds to the End-of-Life voltage (0.9V/cell) for three NiCd or NiMH batteries in series, making the LMC6035/6 well suited for portable and rechargeable systems. It also features a well behaved decrease in its specifications at supply voltages below its ensured 2.7V operation. This provides a “comfort zone” for adequate operation at voltages significantly below 2.7V. Its ultra low input currents (IIN) makes it well suited for low power active filter application, because it allows the use of higher resistor values and lower capacitor values. In addition, the drive capability of the LMC6035/6 gives these op amps a broad range of applications for low voltage systems.

The LMC6035/6 is an economical, low voltage op amp capable of rail-to-rail output swing into loads of 600Ω. LMC6035 is available in a chip sized package (8-Bump DSBGA) using micro SMD package technology. Both allow for single supply operation and are ensured for 2.7V, 3V, 5V and 15V supply voltage. The 2.7 supply voltage corresponds to the End-of-Life voltage (0.9V/cell) for three NiCd or NiMH batteries in series, making the LMC6035/6 well suited for portable and rechargeable systems. It also features a well behaved decrease in its specifications at supply voltages below its ensured 2.7V operation. This provides a “comfort zone” for adequate operation at voltages significantly below 2.7V. Its ultra low input currents (IIN) makes it well suited for low power active filter application, because it allows the use of higher resistor values and lower capacitor values. In addition, the drive capability of the LMC6035/6 gives these op amps a broad range of applications for low voltage systems.

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類型 標題 日期
* Data sheet LMC6035/LMC6035-Q1/LMC6036 Low Pwr 2.7V Single Supply CMOS Op Amp datasheet (Rev. G) 2013年 4月 23日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

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開發板

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使用指南: PDF
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開發板

DUAL-DIYAMP-EVM — 雙通道通用自製 (DIY) 放大器電路評估模組

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使用指南: PDF
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模擬型號

LMC6035 PSPICE Model

SNOM184.ZIP (2 KB) - PSpice Model
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具

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設計工具

CIRCUIT060015 — 可調式參考電壓電路

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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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使用指南: PDF
封裝 引腳 下載
DSBGA (YZR) 8 檢視選項
SOIC (D) 8 檢視選項
VSSOP (DGK) 8 檢視選項

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