LMP7708

現行

精密、CMOS 輸入、RRIO、寬電源範圍去補償雙放大器

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Vos (offset voltage at 25°C) (max) (mV) 0.22 Offset drift (typ) (µV/°C) 1 Input bias current (max) (pA) 1 GBW (typ) (MHz) 14 Features Decompensated Slew rate (typ) (V/µs) 5.6 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.85 Vn at 1 kHz (typ) (nV√Hz) 9 CMRR (typ) (dB) 130 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.066 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) 0.2 Output swing headroom (to negative supply) (typ) (V) 0.04 Output swing headroom (to positive supply) (typ) (V) -0.04 THD + N at 1 kHz (typ) (%) 0.024
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Vos (offset voltage at 25°C) (max) (mV) 0.22 Offset drift (typ) (µV/°C) 1 Input bias current (max) (pA) 1 GBW (typ) (MHz) 14 Features Decompensated Slew rate (typ) (V/µs) 5.6 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.85 Vn at 1 kHz (typ) (nV√Hz) 9 CMRR (typ) (dB) 130 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.066 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) 0.2 Output swing headroom (to negative supply) (typ) (V) 0.04 Output swing headroom (to positive supply) (typ) (V) -0.04 THD + N at 1 kHz (typ) (%) 0.024
VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Unless Otherwise Noted, Typical Values at VS = 5V.
  • Input Offset Voltage (LMP7707) ±200 µV (Max)
  • Input Offset Voltage (LMP7708/LMP7709) ±220 µV (Max)
  • Input Bias Current ±200 fA
  • Input Voltage Noise 9 nV/√Hz
  • CMRR 130 dB
  • Open Loop Gain 130 dB
  • Temperature Range −40°C to 125°C
  • Gain Bandwidth Product (AV =10) 14 MHz
  • Stable at a Gain of 10 or Higher
  • Supply Current (LMP7707) 715 µA
  • Supply Current (LMP7708) 1.5 mA
  • Supply Current (LMP7709) 2.9 mA
  • Supply Voltage Range 2.7V to 12V
  • Rail-to-Rail Input and Output

All trademarks are the property of their respective owners.

  • Unless Otherwise Noted, Typical Values at VS = 5V.
  • Input Offset Voltage (LMP7707) ±200 µV (Max)
  • Input Offset Voltage (LMP7708/LMP7709) ±220 µV (Max)
  • Input Bias Current ±200 fA
  • Input Voltage Noise 9 nV/√Hz
  • CMRR 130 dB
  • Open Loop Gain 130 dB
  • Temperature Range −40°C to 125°C
  • Gain Bandwidth Product (AV =10) 14 MHz
  • Stable at a Gain of 10 or Higher
  • Supply Current (LMP7707) 715 µA
  • Supply Current (LMP7708) 1.5 mA
  • Supply Current (LMP7709) 2.9 mA
  • Supply Voltage Range 2.7V to 12V
  • Rail-to-Rail Input and Output

All trademarks are the property of their respective owners.

The LMP7707/LMP7708/LMP7709 devices are single, dual, and quad low offset voltage, rail-to-rail input and output precision amplifiers which each have a CMOS input stage and a wide supply voltage range. The LMP7707/LMP7708/LMP7709 are part of the LMP precision amplifier family and are ideal for sensor interface and other instrumentation applications. These decompensated amplifiers are stable at a gain of 6 and higher.

The ensured low offset voltage of less than ±200 µV along with the ensured low input bias current of less than ±1 pA make the LMP7707/LMP7708/LMP7709 ideal for precision applications. The LMP7707/LMP7708/LMP7709 are built utilizing VIP50 technology, which allows the combination of a CMOS input stage and a supply voltage range of 12V with rail-to-rail common mode voltage capability. The LMP7707/LMP7708/LMP7709 are the perfect choice in many applications where conventional CMOS parts cannot operate due to the voltage conditions.

The unique design of the rail-to-rail input stage of each of the LMP7707/LMP7708/LMP7709 significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. Both sides of the complimentary input stage have been trimmed, thereby reducing the difference between the NMOS and PMOS offsets. The output swings within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage.

The LMP7707 is offered in the space-saving 5-pin SOT-23 and 8-pin SOIC packages, the LMP7708 is offered in the 8-pin VSSOP and 8-pin SOIC packages, and the quad LMP7709 is offered in the 14-pin TSSOP and 14-pin SOIC packages. These small packages are ideal solutions for area constrained PC boards and portable electronics.

The LMP7707/LMP7708/LMP7709 devices are single, dual, and quad low offset voltage, rail-to-rail input and output precision amplifiers which each have a CMOS input stage and a wide supply voltage range. The LMP7707/LMP7708/LMP7709 are part of the LMP precision amplifier family and are ideal for sensor interface and other instrumentation applications. These decompensated amplifiers are stable at a gain of 6 and higher.

The ensured low offset voltage of less than ±200 µV along with the ensured low input bias current of less than ±1 pA make the LMP7707/LMP7708/LMP7709 ideal for precision applications. The LMP7707/LMP7708/LMP7709 are built utilizing VIP50 technology, which allows the combination of a CMOS input stage and a supply voltage range of 12V with rail-to-rail common mode voltage capability. The LMP7707/LMP7708/LMP7709 are the perfect choice in many applications where conventional CMOS parts cannot operate due to the voltage conditions.

The unique design of the rail-to-rail input stage of each of the LMP7707/LMP7708/LMP7709 significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. Both sides of the complimentary input stage have been trimmed, thereby reducing the difference between the NMOS and PMOS offsets. The output swings within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage.

The LMP7707 is offered in the space-saving 5-pin SOT-23 and 8-pin SOIC packages, the LMP7708 is offered in the 8-pin VSSOP and 8-pin SOIC packages, and the quad LMP7709 is offered in the 14-pin TSSOP and 14-pin SOIC packages. These small packages are ideal solutions for area constrained PC boards and portable electronics.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 LMP7707/7708/7709 Precision, CMOS Input, RRIO, Wide Supply Range Decomp Amp datasheet (Rev. B) 2013/3/25
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
EVM User's guide 551013276/3277 Eval Boards for Dual Decompensated Op Amps (MSOP-8 & SOIC-8) (Rev. A) 2013/5/1

設計與開發

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開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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模擬型號

LMP7707/8/9 PSpice Model (Rev. B)

SNOM108B.ZIP (19 KB) - PSpice 模型
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計算工具

OPAMP-NOISECALC — Noise Calculator

This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:

  • A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VSSOP (DGK) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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