產品詳細資料

Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
HTQFP (PAP) 64 144 mm² (12 mm × 12 mm)
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

下載 觀看有字幕稿的影片 影片

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 LMX2695-SEP 5MHz to 30GHz Wideband Synthesizer With Phase Synchronization and JESD204B/C Support datasheet PDF | HTML 2026/7/20
選擇指南 TI Space Products (Rev. L) 2026/3/27

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LMX2695SEPEVM — LMX2695-SEP 評估模組

LMX2695SEPEVM 用於評估 LMX2695-SEP 裝置的性能。此裝置是一款抗輻射射頻 (RF) 合成器,採用 10mm × 10mm、64 接腳塑膠封裝。此裝置可產生高達 28GHz 的連續波訊號。本評估模組整合所有必要的硬體介面,可協助使用者迅速進行評估與開發作業。
使用指南: PDF | HTML
支援產品和硬體
設計工具

PLLATINUMSIM-SW — PLL 迴路濾波器、相位雜訊、鎖定時間與雜散模擬工具

PLLATINUMSIM-SW 為一模擬工具,可讓使用者建立 PLLatinum™ 積體電路的詳細設計和模擬,包括 LMX 系列的相位鎖定迴路 (PLL) 及合成器。

支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HTQFP (PAP) 64 Ultra Librarian

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片