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放大器
運算放大器 (op amps)
精密運算放大器 (Vos < 1mV)

OPA2333

現行

1.8-V、17-µA、雙通道微功耗零漂移 CMOS 運算放大器

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產品規格表

OPA2333

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.01 Offset drift (typ) (µV/°C) 0.02 Input bias current (max) (pA) 200 GBW (typ) (MHz) 0.35 Features EMI Hardened, Small Size, Zero Drift Slew rate (typ) (V/µs) 0.16 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.017 Vn at 1 kHz (typ) (nV√Hz) 55 CMRR (typ) (dB) 130 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.005 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.03 Output swing headroom (to positive supply) (typ) (V) -0.03
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.01 Offset drift (typ) (µV/°C) 0.02 Input bias current (max) (pA) 200 GBW (typ) (MHz) 0.35 Features EMI Hardened, Small Size, Zero Drift Slew rate (typ) (V/µs) 0.16 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.017 Vn at 1 kHz (typ) (nV√Hz) 55 CMRR (typ) (dB) 130 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.005 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.03 Output swing headroom (to positive supply) (typ) (V) -0.03
VSON (DRB) 8 9 mm² (3 mm × 3 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm)
  • Low Offset Voltage: 10 µV (Maximum)
  • Zero Drift: 0.05 µV/°C (Maximum)
  • 0.01-Hz to 10-Hz Noise: 1.1 µVPP
  • Quiescent Current: 17 µA
  • Single-Supply Operation
  • Supply Voltage: 1.8 V to 5.5V
  • Rail-to-Rail Input/Output
  • microSize Packages: SC70 and SOT23
  • Low Offset Voltage: 10 µV (Maximum)
  • Zero Drift: 0.05 µV/°C (Maximum)
  • 0.01-Hz to 10-Hz Noise: 1.1 µVPP
  • Quiescent Current: 17 µA
  • Single-Supply Operation
  • Supply Voltage: 1.8 V to 5.5V
  • Rail-to-Rail Input/Output
  • microSize Packages: SC70 and SOT23

The OPAx333 series of CMOS operational amplifiers use a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10 µV, maximum) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and rail-to-rail output that swings within 50 mV of the rails. Single or dual supplies as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V) can be used. These devices are optimized for low-voltage, single-supply operation.

The OPAx333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity.

The OPA333 (single version) is available in the 5-pin SOT-23, SOT, and 8-pin SOIC packages, while the OPA2333 (dual version) is available in the 8-pin VSON, SOIC, and VSSOP packages. All versions are specified for operation from –40°C to 125°C.

The OPAx333 series of CMOS operational amplifiers use a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10 µV, maximum) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and rail-to-rail output that swings within 50 mV of the rails. Single or dual supplies as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V) can be used. These devices are optimized for low-voltage, single-supply operation.

The OPAx333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity.

The OPA333 (single version) is available in the 5-pin SOT-23, SOT, and 8-pin SOIC packages, while the OPA2333 (dual version) is available in the 8-pin VSON, SOIC, and VSSOP packages. All versions are specified for operation from –40°C to 125°C.
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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 OPAx333 1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series datasheet (Rev. E) PDF | HTML 2015/12/17
Application brief Offset Correction Methods: Laser Trim, e-Trim, and Chopper (Rev. D) PDF | HTML 2024/12/5
Circuit design Low-power, bidirectional current-sensing circuit (Rev. B) PDF | HTML 2024/10/2
電子書 An Engineer’s Guide to Designing with Precision Amplifiers 2021/4/29
技術文章 Designing with low-power op amps, part 1: Power-saving techniques for op-amp circu PDF | HTML 2021/2/2
Application brief Low-Power, Small-Size, High-Side Current Monitoring 2020/6/3
Application brief High-Performance 16-bit PWM to 4- to 20-mA DAC for Field Transmitters 2020/3/26
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
應用說明 OPA333, OPA2333 EMI Immunity Performance (Rev. A) 2012/10/31

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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模擬型號

OPAx333 PSpice Model (Rev. G)

SBOC084G.ZIP (30 KB) - PSpice 模型
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模擬型號

OPAx333 TINA-TI Reference Design (Rev. G)

SBOC083G (323 KB) - TINA-TI 參考設計
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模擬型號

OPAx333 TINA-TI Spice Model (Rev. F)

SBOM166F.ZIP (11 KB) - TINA-TI Spice 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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計算工具

OPAMP-NOISECALC — Noise Calculator

This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:

  • A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
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參考設計

TIPD102 — 高壓側 V-I 轉換器、0-2V 至 0-100mA、1% 全幅誤差

This Verified Design delivers a well-regulated current to a ground-referenced load that could be used for actuators, sensors, motors, and many other applications. The design utilizes a two-stage approach to allow the high-side current source to accept a ground-referenced input. The first stage uses (...)

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參考設計

TIPD114 — 1KHz AC、1mW、18 位元、1Msps 資料擷取參考設計

This verified design provides results of a low power, low throughput use case of ADS8881. One of the ways to reduce power for a low throughput application is to select a high throughput (1 MSPS) part and run it at low speed. The power consumed by ADS8881 is 55uW for 10kSPS. The reference drive and (...)

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參考設計

TIPD116 — 適用於 ECG 系統的資料擷取區塊、分離式 LEAD I ECG 實作參考設計

This verified design is for Electrocardiography (ECG), the measurement of the electrical activity of the heart, a method that requires a precision analog front end instrumentation gain stage, filtering, and high resolution digital conversion. This design features the methodology for achieving a (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VSON (DRB) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
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