OPA2828
- Low input voltage noise density: 4 nV/√Hz at 1 kHz
- Input voltage noise: 0.1 Hz to 10 Hz: 60 nVRMS
- Low input bias current:
- 0.1 pA (DGN)
- 1 pA (D)
- Input offset voltage:
- 25 µV (DGN)
- 50 µV (D)
- Input offset drift:
- 0.2 µV/°C (DGN)
- 0.45 µV/°C (D)
- MUX-friendly inputs
- Gain bandwidth: 45 MHz
- Slew rate: 150 V/µs
- 14-bit settling time: 120 ns
- Overload power limiter
- Wide supply voltage range: ±4 V to ±18 V
- Packages:
- D Package: 8-pin SOIC
- DGN Package: 8-pin HVSSOP
The OPA828 and OPA2828 ( OPAx828) JFET input operational amplifiers are the next generation OPA627 and OPA827, combining high speed with high dc precision and ac performance. These op amps supply low offset voltage, low drift over temperature, low bias current, and low noise with only 60-nVRMS 0.1-Hz to 10-Hz noise. The OPAx828 operate over a wide supply-voltage range of ±4 V to ±18 V and a supply current of 5.5 mA/channel, typical.
AC characteristics, including a 45-MHz gain bandwidth product (GBW), a slew rate of 150 V/µs, and precision dc characteristics, make the OPAx828 family an excellent choice for a variety of systems. These include high-speed and high-resolution data-acquisition systems, such as 16-bit to 18-bit mixed signal systems, transimpedance (I/V-conversion) amplifiers, filters, precision ±10-V front ends, and high-impedance sensor-interface applications.
The OPAx828 are available in an 8-pin SOIC package and a thermally enhanced, 8-pin HVSSOP PowerPAD™ integrated circuit package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | OPAx828 Low-Offset, Low-Drift, Low-Noise, 45-MHz, 36-V, JFET-Input Operational Amplifiers datasheet (Rev. D) | PDF | HTML | 2022/12/29 | ||
| Circuit design | Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) | PDF | HTML | 2024/9/19 | |||
| 白皮書 | Op Amp Input and Output Swing Limitations | PDF | HTML | 2023/12/7 | |||
| 應用說明 | Thermally-Enhanced Packages Improve Precision for Operational Amplifiers | PDF | HTML | 2023/5/26 | |||
| Application brief | Trade-offs Between CMOS, JFET, and Bipolar Input Stage Technology | 2019/5/29 | ||||
| Application brief | Simplify Transimpedance Applications with High-bandwidth, Precision JFET Op Amps | 2019/5/21 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
OPAMP-NOISECALC — Noise Calculator
This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:
- A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HVSSOP (DGN) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。