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運算放大器 (op amps)
精密運算放大器 (Vos < 1mV)

OPA4140

現行

具有軌至軌輸出的四通道、11-MHz、低雜訊 36-V JFET 精密運算放大器

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產品規格表

OPA4140

現行
立即訂購

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Vos (offset voltage at 25°C) (max) (mV) 0.12 Offset drift (typ) (µV/°C) 0.35 Input bias current (max) (pA) 10 GBW (typ) (MHz) 11 Slew rate (typ) (V/µs) 20 Rail-to-rail In to V-, Out Iq per channel (typ) (mA) 1.8 Vn at 1 kHz (typ) (nV√Hz) 5.1 CMRR (typ) (dB) 140 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.03 Architecture FET Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) -3.5 Output swing headroom (to negative supply) (typ) (V) 0.2 Output swing headroom (to positive supply) (typ) (V) -0.2 THD + N at 1 kHz (typ) (%) 0.00005
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Vos (offset voltage at 25°C) (max) (mV) 0.12 Offset drift (typ) (µV/°C) 0.35 Input bias current (max) (pA) 10 GBW (typ) (MHz) 11 Slew rate (typ) (V/µs) 20 Rail-to-rail In to V-, Out Iq per channel (typ) (mA) 1.8 Vn at 1 kHz (typ) (nV√Hz) 5.1 CMRR (typ) (dB) 140 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.03 Architecture FET Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) -3.5 Output swing headroom (to negative supply) (typ) (V) 0.2 Output swing headroom (to positive supply) (typ) (V) -0.2 THD + N at 1 kHz (typ) (%) 0.00005
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Very-low offset drift: 1 µV/°C maximum
  • Very-low offset: 120 µV
  • Low input bias current: 10 pA maximum
  • Very-low 1/f noise: 250 nV PP, 0.1 Hz to 10 Hz
  • Low noise: 5.1 nV/√ Hz
  • Slew rate: 20 V/µs
  • Low supply current: 2 mA maximum
  • Input voltage range includes V– supply
  • Single-supply operation: 4.5 V to 36 V
  • Dual-supply operation: ±2.25 V to ±18 V
  • No phase reversal
  • Packages:
    • Industry-standard SOIC, SON, SOT-23, TSSOP, and VSSOP
  • Very-low offset drift: 1 µV/°C maximum
  • Very-low offset: 120 µV
  • Low input bias current: 10 pA maximum
  • Very-low 1/f noise: 250 nV PP, 0.1 Hz to 10 Hz
  • Low noise: 5.1 nV/√ Hz
  • Slew rate: 20 V/µs
  • Low supply current: 2 mA maximum
  • Input voltage range includes V– supply
  • Single-supply operation: 4.5 V to 36 V
  • Dual-supply operation: ±2.25 V to ±18 V
  • No phase reversal
  • Packages:
    • Industry-standard SOIC, SON, SOT-23, TSSOP, and VSSOP

The OPA140, OPA2140, and OPA4140 (OPAx140) operational amplifier (op amp) family is a series of low-power JFET input amplifiers that features good drift and low input bias current. The rail-to-rail output swing and input range that includes V– allow designers to take advantage of the low-noise characteristics of JFET amplifiers while also interfacing to modern, single-supply, precision analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).

The OPA140 achieves 11-MHz unity-gain bandwidth and 20-V/µs slew rate while consuming only 1.8 mA (typical) of quiescent current. This device runs on a single 4.5-V to 36-V supply or dual ±2.25-V to ±18-V supplies.

All versions are fully specified from –40°C to +125°C for use in the most challenging environments. The OPA140 (single) is available in the 5‑pin SOT-23 8‑pin VSSOP and 8‑pin SOIC packages. The OPA2140 (dual) is available in 8‑pin SON, 8‑pin VSSOP, and 8‑pin SOIC packages. The OPA4140 (quad) is available in the 14‑pin SOIC and 14‑pin TSSOP packages.

The OPA140, OPA2140, and OPA4140 (OPAx140) operational amplifier (op amp) family is a series of low-power JFET input amplifiers that features good drift and low input bias current. The rail-to-rail output swing and input range that includes V– allow designers to take advantage of the low-noise characteristics of JFET amplifiers while also interfacing to modern, single-supply, precision analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).

The OPA140 achieves 11-MHz unity-gain bandwidth and 20-V/µs slew rate while consuming only 1.8 mA (typical) of quiescent current. This device runs on a single 4.5-V to 36-V supply or dual ±2.25-V to ±18-V supplies.

All versions are fully specified from –40°C to +125°C for use in the most challenging environments. The OPA140 (single) is available in the 5‑pin SOT-23 8‑pin VSSOP and 8‑pin SOIC packages. The OPA2140 (dual) is available in 8‑pin SON, 8‑pin VSSOP, and 8‑pin SOIC packages. The OPA4140 (quad) is available in the 14‑pin SOIC and 14‑pin TSSOP packages.
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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 OPAx140 High-Precision, Low-Noise, Rail-to-Rail Output, 11-MHz, JFET Op Amps datasheet (Rev. F) PDF | HTML 2023/3/28
Application brief Offset Correction Methods: Laser Trim, e-Trim, and Chopper (Rev. D) PDF | HTML 2024/12/5
Application brief MUX-Friendly, Precision Operational Amplifiers (Rev. C) PDF | HTML 2022/2/8
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
應用說明 OPA140, OPA2140, OPA4140 EMI Immunity Performance 2013/12/31

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
支援產品和硬體
模擬型號

OPAx140 PSpice Model (Rev. D)

SBOM493D.ZIP (30 KB) - PSpice 模型
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模擬型號

OPAx140 TINA-TI Reference Design (Rev. E)

SBOM431E (348 KB) - TINA-TI 參考設計
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模擬型號

OPAx140 TINA-TI Spice Model (Rev. E)

SBOM430E.ZIP (11 KB) - TINA-TI Spice 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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計算工具

OPAMP-NOISECALC — Noise Calculator

This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:

  • A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
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參考設計

TIDA-00119 — 適用於可編程邏輯控制器 (PLC) 的 12 位元、八通道整合式類比輸入模組

TIDA-00119 是一款完整、高度整合的 PLC 類比輸入模組前端參考設計，專為符合 IEC61000-4 工業自動化系統標準所設計與測試。此設計可針對 4 個差動輸入或 8 個單端輸入進行配置，具備 12 位元 ADC 解析度和高達 1MSPS 的取樣率。這些輸入也可編程，以接收可選範圍的電流或電壓輸入。此設計也包括提供所有必要模組電壓、輸入突波與 ESD 防護的隔離式電源供應器，以及可透過 SPI 介面連接至任何微控制器、FPGA 或 ASIC 的隔離式數位資料介面。提供完整文件、測試結果、設計檔案和必要的韌體，以協助縮短上市時間。

支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
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